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ARM: S5PV210: Enable USB HSOTG gadget build
Add the necessary definitions and mapping information to enable the s3c-hsotg gadget to build. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -95,6 +95,11 @@ static struct map_desc s5pv210_iodesc[] __initdata = {
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.pfn = __phys_to_pfn(S5PV210_PA_DMC1),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S3C_VA_USB_HSPHY,
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.pfn =__phys_to_pfn(S5PV210_PA_HSPHY),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}
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};
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@ -73,6 +73,9 @@
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#define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000))
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#define S5PV210_PA_HSOTG (0xEC000000)
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#define S5PV210_PA_HSPHY (0xEC100000)
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#define S5PV210_PA_VIC0 (0xF2000000)
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#define S5PV210_PA_VIC1 (0xF2100000)
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#define S5PV210_PA_VIC2 (0xF2200000)
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@ -111,6 +114,7 @@
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#define S3C_PA_FB S5PV210_PA_FB
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#define S3C_PA_RTC S5PV210_PA_RTC
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#define S3C_PA_WDT S5PV210_PA_WATCHDOG
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#define S3C_PA_USB_HSOTG S5PV210_PA_HSOTG
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#define S5P_PA_FIMC0 S5PV210_PA_FIMC0
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#define S5P_PA_FIMC1 S5PV210_PA_FIMC1
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#define S5P_PA_FIMC2 S5PV210_PA_FIMC2
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19
arch/arm/mach-s5pv210/include/mach/regs-sys.h
Normal file
19
arch/arm/mach-s5pv210/include/mach/regs-sys.h
Normal file
@ -0,0 +1,19 @@
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/* arch/arm/mach-s5pv210/include/mach/regs-sys.h
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* S5PV210 - System registers definitions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define S5PV210_USB_PHY_CON (S3C_VA_SYS + 0xE80C)
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#define S5PV210_USB_PHY0_EN (1 << 0)
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#define S5PV210_USB_PHY1_EN (1 << 1)
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/* compatibility defines for s3c-hsotg driver */
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#define S3C64XX_OTHERS S5PV210_USB_PHY_CON
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#define S3C64XX_OTHERS_USBMASK S5PV210_USB_PHY0_EN
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@ -18,6 +18,7 @@
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#define S5P_VA_SYSTIMER S3C_ADDR(0x01200000)
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#define S5P_VA_SROMC S3C_ADDR(0x01100000)
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#define S5P_VA_SYSRAM S3C_ADDR(0x01180000)
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#define S3C_VA_USB_HSPHY S3C_ADDR(0x02000000)
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#define S5P_VA_DMC0 S3C_ADDR(0x00A00000)
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#define S5P_VA_DMC1 S3C_ADDR(0x00A80000)
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