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[PATCH] genirq: x86_64 irq: Kill irq compression
With more irqs in the system we don't need this. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rajesh Shah <rajesh.shah@intel.com> Cc: Andi Kleen <ak@muc.de> Cc: "Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -1415,8 +1415,6 @@ static inline void unlock_ExtINT_logic(void)
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spin_unlock_irqrestore(&ioapic_lock, flags);
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spin_unlock_irqrestore(&ioapic_lock, flags);
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}
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}
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int timer_uses_ioapic_pin_0;
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/*
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/*
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* This code may look a bit paranoid, but it's supposed to cooperate with
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* This code may look a bit paranoid, but it's supposed to cooperate with
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* a wide range of boards and BIOS bugs. Fortunately only the timer IRQ
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* a wide range of boards and BIOS bugs. Fortunately only the timer IRQ
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@ -1453,9 +1451,6 @@ static inline void check_timer(void)
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pin2 = ioapic_i8259.pin;
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pin2 = ioapic_i8259.pin;
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apic2 = ioapic_i8259.apic;
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apic2 = ioapic_i8259.apic;
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if (pin1 == 0)
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timer_uses_ioapic_pin_0 = 1;
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apic_printk(APIC_VERBOSE,KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n",
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apic_printk(APIC_VERBOSE,KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n",
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vector, apic1, pin1, apic2, pin2);
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vector, apic1, pin1, apic2, pin2);
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@ -790,20 +790,11 @@ void __init mp_config_acpi_legacy_irqs(void)
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}
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}
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}
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}
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#define MAX_GSI_NUM 4096
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int mp_register_gsi(u32 gsi, int triggering, int polarity)
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int mp_register_gsi(u32 gsi, int triggering, int polarity)
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{
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{
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int ioapic = -1;
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int ioapic = -1;
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int ioapic_pin = 0;
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int ioapic_pin = 0;
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int idx, bit = 0;
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int idx, bit = 0;
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static int pci_irq = 16;
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/*
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* Mapping between Global System Interrupts, which
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* represent all possible interrupts, to the IRQs
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* assigned to actual devices.
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*/
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static int gsi_to_irq[MAX_GSI_NUM];
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if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
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if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
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return gsi;
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return gsi;
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@ -836,42 +827,11 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity)
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if ((1<<bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {
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if ((1<<bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {
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Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
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Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
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mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
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mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
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return gsi_to_irq[gsi];
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return gsi;
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}
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}
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mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit);
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mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit);
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if (triggering == ACPI_LEVEL_SENSITIVE) {
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/*
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* For PCI devices assign IRQs in order, avoiding gaps
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* due to unused I/O APIC pins.
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*/
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int irq = gsi;
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if (gsi < MAX_GSI_NUM) {
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/*
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* Retain the VIA chipset work-around (gsi > 15), but
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* avoid a problem where the 8254 timer (IRQ0) is setup
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* via an override (so it's not on pin 0 of the ioapic),
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* and at the same time, the pin 0 interrupt is a PCI
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* type. The gsi > 15 test could cause these two pins
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* to be shared as IRQ0, and they are not shareable.
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* So test for this condition, and if necessary, avoid
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* the pin collision.
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*/
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if (gsi > 15 || (gsi == 0 && !timer_uses_ioapic_pin_0))
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gsi = pci_irq++;
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/*
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* Don't assign IRQ used by ACPI SCI
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*/
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if (gsi == acpi_fadt.sci_int)
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gsi = pci_irq++;
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gsi_to_irq[irq] = gsi;
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} else {
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printk(KERN_ERR "GSI %u is too high\n", gsi);
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return gsi;
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}
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}
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io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
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io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
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triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
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triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
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polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
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polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
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@ -162,7 +162,6 @@ extern int skip_ioapic_setup;
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extern int io_apic_get_version (int ioapic);
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extern int io_apic_get_version (int ioapic);
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extern int io_apic_get_redir_entries (int ioapic);
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extern int io_apic_get_redir_entries (int ioapic);
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extern int io_apic_set_pci_routing (int ioapic, int pin, int irq, int, int);
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extern int io_apic_set_pci_routing (int ioapic, int pin, int irq, int, int);
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extern int timer_uses_ioapic_pin_0;
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#endif
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#endif
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extern int sis_apic_bug; /* dummy */
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extern int sis_apic_bug; /* dummy */
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