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atl1: explain 32-bit DMA restriction
Document the fact that atl1 uses a single shared register for the high 32 bits of 64-bit DMA addresses, making 64-bit DMA more trouble than it's worth. Signed-off-by: Chris Snook <csnook@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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@ -2209,8 +2209,14 @@ static int __devinit atl1_probe(struct pci_dev *pdev,
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return err;
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/*
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* 64-bit DMA currently has data corruption problems, so let's just
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* use 32-bit DMA for now. This is a big hack that is probably wrong.
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* The atl1 chip can DMA to 64-bit addresses, but it uses a single
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* shared register for the high 32 bits, so only a single, aligned,
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* 4 GB physical address range can be used at a time.
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*
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* Supporting 64-bit DMA on this hardware is more trouble than it's
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* worth. It is far easier to limit to 32-bit DMA than update
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* various kernel subsystems to support the mechanics required by a
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* fixed-high-32-bit system.
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*/
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err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
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if (err) {
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