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https://github.com/FEX-Emu/linux.git
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Merge branches 'clk-aspeed', 'clk-unused', 'clk-of-node-put', 'clk-const-bulk-data' and 'clk-debugfs' into clk-next
- Add SDIO gate to aspeed driver - Support aspeed AST2600 SoC - Add missing of_node_put() calls in various clk drivers - Drop NULL checks in clk debugfs - Add min/max rates to clk debugfs * clk-aspeed: clk: Add support for AST2600 SoC clk: aspeed: Move structures to header clk: aspeed: Add SDIO gate * clk-unused: clk: st: clkgen-pll: remove unused variable 'st_pll3200c32_407_a0' clk: st: clkgen-fsyn: remove unused variable 'st_quadfs_fs660c32_ops' clk: composite: Drop unused clk.h include clk: Si5341/Si5340: remove redundant assignment to n_den clk: qoriq: Fix -Wunused-const-variable * clk-of-node-put: clk: ti: dm814x: Add of_node_put() to prevent memory leak clk: st: clk-flexgen: Add of_node_put() in st_of_flexgen_setup() clk: davinci: pll: Add of_node_put() in of_davinci_pll_init() clk: versatile: Add of_node_put() in cm_osc_setup() * clk-const-bulk-data: clk: Constify struct clk_bulk_data * where possible * clk-debugfs: clk: Drop !clk checks in debugfs dumping clk: Use seq_puts() in possible_parent_show() clk: Assert prepare_lock in clk_core_get_boundaries clk: Add clk_min/max_rate entries in debugfs
This commit is contained in:
commit
cee99529ee
@ -3,7 +3,6 @@
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* Copyright (c) 2013 NVIDIA CORPORATION. All rights reserved.
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*/
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/slab.h>
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@ -686,7 +686,7 @@ static const struct clockgen_chipinfo chipinfo[] = {
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.guts_compat = "fsl,qoriq-device-config-1.0",
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.init_periph = p5020_init_periph,
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.cmux_groups = {
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&p2041_cmux_grp1, &p2041_cmux_grp2
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&p5020_cmux_grp1, &p5020_cmux_grp2
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},
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.cmux_to_group = {
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0, 1, -1
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@ -547,7 +547,6 @@ static int si5341_synth_clk_set_rate(struct clk_hw *hw, unsigned long rate,
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bool is_integer;
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n_num = synth->data->freq_vco;
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n_den = rate;
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/* see if there's an integer solution */
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r = do_div(n_num, rate);
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@ -593,6 +593,8 @@ static void clk_core_get_boundaries(struct clk_core *core,
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{
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struct clk *clk_user;
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lockdep_assert_held(&prepare_lock);
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*min_rate = core->min_rate;
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*max_rate = core->max_rate;
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@ -2847,9 +2849,6 @@ static struct hlist_head *orphan_list[] = {
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static void clk_summary_show_one(struct seq_file *s, struct clk_core *c,
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int level)
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{
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if (!c)
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return;
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seq_printf(s, "%*s%-*s %7d %8d %8d %11lu %10lu %5d %6d\n",
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level * 3 + 1, "",
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30 - level * 3, c->name,
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@ -2864,9 +2863,6 @@ static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
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{
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struct clk_core *child;
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if (!c)
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return;
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clk_summary_show_one(s, c, level);
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hlist_for_each_entry(child, &c->children, child_node)
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@ -2896,8 +2892,9 @@ DEFINE_SHOW_ATTRIBUTE(clk_summary);
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static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
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{
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if (!c)
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return;
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unsigned long min_rate, max_rate;
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clk_core_get_boundaries(c, &min_rate, &max_rate);
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/* This should be JSON format, i.e. elements separated with a comma */
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seq_printf(s, "\"%s\": { ", c->name);
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@ -2905,6 +2902,8 @@ static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
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seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
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seq_printf(s, "\"protect_count\": %d,", c->protect_count);
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seq_printf(s, "\"rate\": %lu,", clk_core_get_rate(c));
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seq_printf(s, "\"min_rate\": %lu,", min_rate);
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seq_printf(s, "\"max_rate\": %lu,", max_rate);
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seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy(c));
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seq_printf(s, "\"phase\": %d,", clk_core_get_phase(c));
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seq_printf(s, "\"duty_cycle\": %u",
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@ -2915,9 +2914,6 @@ static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
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{
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struct clk_core *child;
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if (!c)
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return;
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clk_dump_one(s, c, level);
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hlist_for_each_entry(child, &c->children, child_node) {
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@ -3013,15 +3009,15 @@ static void possible_parent_show(struct seq_file *s, struct clk_core *core,
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*/
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parent = clk_core_get_parent_by_index(core, i);
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if (parent)
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seq_printf(s, "%s", parent->name);
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seq_puts(s, parent->name);
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else if (core->parents[i].name)
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seq_printf(s, "%s", core->parents[i].name);
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seq_puts(s, core->parents[i].name);
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else if (core->parents[i].fw_name)
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seq_printf(s, "<%s>(fw)", core->parents[i].fw_name);
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else if (core->parents[i].index >= 0)
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seq_printf(s, "%s",
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of_clk_get_parent_name(core->of_node,
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core->parents[i].index));
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seq_puts(s,
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of_clk_get_parent_name(core->of_node,
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core->parents[i].index));
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else
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seq_puts(s, "(missing)");
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@ -3064,6 +3060,34 @@ static int clk_duty_cycle_show(struct seq_file *s, void *data)
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}
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DEFINE_SHOW_ATTRIBUTE(clk_duty_cycle);
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static int clk_min_rate_show(struct seq_file *s, void *data)
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{
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struct clk_core *core = s->private;
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unsigned long min_rate, max_rate;
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clk_prepare_lock();
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clk_core_get_boundaries(core, &min_rate, &max_rate);
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clk_prepare_unlock();
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seq_printf(s, "%lu\n", min_rate);
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return 0;
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}
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DEFINE_SHOW_ATTRIBUTE(clk_min_rate);
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static int clk_max_rate_show(struct seq_file *s, void *data)
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{
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struct clk_core *core = s->private;
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unsigned long min_rate, max_rate;
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clk_prepare_lock();
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clk_core_get_boundaries(core, &min_rate, &max_rate);
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clk_prepare_unlock();
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seq_printf(s, "%lu\n", max_rate);
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return 0;
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}
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DEFINE_SHOW_ATTRIBUTE(clk_max_rate);
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static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
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{
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struct dentry *root;
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@ -3075,6 +3099,8 @@ static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
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core->dentry = root;
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debugfs_create_ulong("clk_rate", 0444, root, &core->rate);
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debugfs_create_file("clk_min_rate", 0444, root, core, &clk_min_rate_fops);
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debugfs_create_file("clk_max_rate", 0444, root, core, &clk_max_rate_fops);
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debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy);
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debugfs_create_u32("clk_phase", 0444, root, &core->phase);
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debugfs_create_file("clk_flags", 0444, root, core, &clk_flags_fops);
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@ -778,12 +778,15 @@ int of_davinci_pll_init(struct device *dev, struct device_node *node,
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int i;
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clk_data = kzalloc(sizeof(*clk_data), GFP_KERNEL);
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if (!clk_data)
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if (!clk_data) {
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of_node_put(child);
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return -ENOMEM;
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}
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clks = kmalloc_array(n_clks, sizeof(*clks), GFP_KERNEL);
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if (!clks) {
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kfree(clk_data);
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of_node_put(child);
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return -ENOMEM;
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}
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@ -326,6 +326,7 @@ static void __init st_of_flexgen_setup(struct device_node *np)
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return;
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reg = of_iomap(pnode, 0);
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of_node_put(pnode);
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if (!reg)
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return;
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@ -67,7 +67,6 @@ struct clkgen_quadfs_data {
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};
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static const struct clk_ops st_quadfs_pll_c32_ops;
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static const struct clk_ops st_quadfs_fs660c32_ops;
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static int clk_fs660c32_dig_get_params(unsigned long input,
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unsigned long output, struct stm_fs *fs);
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@ -61,19 +61,6 @@ static const struct clk_ops stm_pll3200c32_ops;
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static const struct clk_ops stm_pll3200c32_a9_ops;
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static const struct clk_ops stm_pll4600c28_ops;
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static const struct clkgen_pll_data st_pll3200c32_407_a0 = {
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/* 407 A0 */
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.pdn_status = CLKGEN_FIELD(0x2a0, 0x1, 8),
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.pdn_ctrl = CLKGEN_FIELD(0x2a0, 0x1, 8),
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.locked_status = CLKGEN_FIELD(0x2a0, 0x1, 24),
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.ndiv = CLKGEN_FIELD(0x2a4, C32_NDIV_MASK, 16),
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.idf = CLKGEN_FIELD(0x2a4, C32_IDF_MASK, 0x0),
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.num_odfs = 1,
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.odf = { CLKGEN_FIELD(0x2b4, C32_ODF_MASK, 0) },
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.odf_gate = { CLKGEN_FIELD(0x2b4, 0x1, 6) },
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.ops = &stm_pll3200c32_ops,
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};
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static const struct clkgen_pll_data st_pll3200c32_cx_0 = {
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/* 407 C0 PLL0 */
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.pdn_status = CLKGEN_FIELD(0x2a0, 0x1, 8),
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}
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of_platform_populate(np, NULL, NULL, NULL);
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of_node_put(np);
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return 0;
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}
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@ -70,6 +70,7 @@ static void __init cm_osc_setup(struct device_node *np,
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return;
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}
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cm_base = of_iomap(parent, 0);
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of_node_put(parent);
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if (!cm_base) {
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pr_err("could not remap core module base\n");
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return;
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@ -239,7 +239,8 @@ static inline int clk_prepare(struct clk *clk)
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return 0;
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}
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static inline int __must_check clk_bulk_prepare(int num_clks, struct clk_bulk_data *clks)
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static inline int __must_check
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clk_bulk_prepare(int num_clks, const struct clk_bulk_data *clks)
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{
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might_sleep();
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return 0;
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@ -263,7 +264,8 @@ static inline void clk_unprepare(struct clk *clk)
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{
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might_sleep();
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}
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static inline void clk_bulk_unprepare(int num_clks, struct clk_bulk_data *clks)
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static inline void clk_bulk_unprepare(int num_clks,
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const struct clk_bulk_data *clks)
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{
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might_sleep();
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}
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@ -819,7 +821,8 @@ static inline int clk_enable(struct clk *clk)
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return 0;
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}
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static inline int __must_check clk_bulk_enable(int num_clks, struct clk_bulk_data *clks)
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static inline int __must_check clk_bulk_enable(int num_clks,
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const struct clk_bulk_data *clks)
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{
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return 0;
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}
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@ -828,7 +831,7 @@ static inline void clk_disable(struct clk *clk) {}
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static inline void clk_bulk_disable(int num_clks,
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struct clk_bulk_data *clks) {}
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const struct clk_bulk_data *clks) {}
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static inline unsigned long clk_get_rate(struct clk *clk)
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{
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@ -917,8 +920,8 @@ static inline void clk_disable_unprepare(struct clk *clk)
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clk_unprepare(clk);
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}
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static inline int __must_check clk_bulk_prepare_enable(int num_clks,
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struct clk_bulk_data *clks)
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static inline int __must_check
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clk_bulk_prepare_enable(int num_clks, const struct clk_bulk_data *clks)
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{
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int ret;
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@ -933,7 +936,7 @@ static inline int __must_check clk_bulk_prepare_enable(int num_clks,
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}
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static inline void clk_bulk_disable_unprepare(int num_clks,
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struct clk_bulk_data *clks)
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const struct clk_bulk_data *clks)
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{
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clk_bulk_disable(num_clks, clks);
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clk_bulk_unprepare(num_clks, clks);
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