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[S390] s390: clear high-order bits of registers after sam64
When the kernel is IPLed without the CLEAR option and switches to 64-bit, the high-order half of the registers might contain random values. This can cause addressing exceptions and the kernel enters an interrupt loop. Initialize the high-order half of the general purpose registers with zeros after switching to 64-bit mode. Cc: <stable@kernel.org> Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
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@ -83,6 +83,8 @@ startup_continue:
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slr %r0,%r0 # set cpuid to zero
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slr %r0,%r0 # set cpuid to zero
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sigp %r1,%r0,0x12 # switch to esame mode
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sigp %r1,%r0,0x12 # switch to esame mode
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sam64 # switch to 64 bit mode
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sam64 # switch to 64 bit mode
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llgfr %r13,%r13 # clear high-order half of base reg
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lmh %r0,%r15,.Lzero64-.LPG1(%r13) # clear high-order half
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lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
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lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
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lg %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
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lg %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
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# move IPL device to lowcore
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# move IPL device to lowcore
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@ -127,6 +129,7 @@ startup_continue:
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.L4malign:.quad 0xffffffffffc00000
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.L4malign:.quad 0xffffffffffc00000
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.Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8
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.Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8
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.Lnop: .long 0x07000700
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.Lnop: .long 0x07000700
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.Lzero64:.fill 16,4,0x0
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#ifdef CONFIG_ZFCPDUMP
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#ifdef CONFIG_ZFCPDUMP
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.Lcurrent_cpu:
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.Lcurrent_cpu:
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.long 0x0
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.long 0x0
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