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https://github.com/FEX-Emu/linux.git
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[S390] add hardware capability support (ELF_HWCAP).
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
This commit is contained in:
Martin Schwidefsky
parent
e296306277
commit
cf8ba7a955
@ -74,6 +74,8 @@ unsigned int console_mode = 0;
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unsigned int console_devno = -1;
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unsigned int console_irq = -1;
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unsigned long machine_flags = 0;
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unsigned long elf_hwcap = 0;
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char elf_platform[ELF_PLATFORM_SIZE];
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struct mem_chunk __initdata memory_chunk[MEMORY_CHUNKS];
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volatile int __cpu_logical_map[NR_CPUS]; /* logical cpu to cpu address */
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@ -749,6 +751,98 @@ setup_memory(void)
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#endif
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}
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static __init unsigned int stfl(void)
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{
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asm volatile(
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" .insn s,0xb2b10000,0(0)\n" /* stfl */
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"0:\n"
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EX_TABLE(0b,0b));
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return S390_lowcore.stfl_fac_list;
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}
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static __init int stfle(unsigned long long *list, int doublewords)
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{
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typedef struct { unsigned long long _[doublewords]; } addrtype;
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register unsigned long __nr asm("0") = doublewords - 1;
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asm volatile(".insn s,0xb2b00000,%0" /* stfle */
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: "=m" (*(addrtype *) list), "+d" (__nr) : : "cc");
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return __nr + 1;
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}
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/*
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* Setup hardware capabilities.
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*/
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static void __init setup_hwcaps(void)
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{
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static const int stfl_bits[6] = { 0, 2, 7, 17, 19, 21 };
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struct cpuinfo_S390 *cpuinfo = &S390_lowcore.cpu_data;
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unsigned long long facility_list_extended;
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unsigned int facility_list;
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int i;
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facility_list = stfl();
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/*
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* The store facility list bits numbers as found in the principles
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* of operation are numbered with bit 1UL<<31 as number 0 to
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* bit 1UL<<0 as number 31.
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* Bit 0: instructions named N3, "backported" to esa-mode
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* Bit 2: z/Architecture mode is active
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* Bit 7: the store-facility-list-extended facility is installed
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* Bit 17: the message-security assist is installed
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* Bit 19: the long-displacement facility is installed
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* Bit 21: the extended-immediate facility is installed
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* These get translated to:
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* HWCAP_S390_ESAN3 bit 0, HWCAP_S390_ZARCH bit 1,
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* HWCAP_S390_STFLE bit 2, HWCAP_S390_MSA bit 3,
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* HWCAP_S390_LDISP bit 4, and HWCAP_S390_EIMM bit 5.
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*/
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for (i = 0; i < 6; i++)
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if (facility_list & (1UL << (31 - stfl_bits[i])))
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elf_hwcap |= 1UL << i;
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/*
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* Check for additional facilities with store-facility-list-extended.
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* stfle stores doublewords (8 byte) with bit 1ULL<<63 as bit 0
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* and 1ULL<<0 as bit 63. Bits 0-31 contain the same information
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* as stored by stfl, bits 32-xxx contain additional facilities.
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* How many facility words are stored depends on the number of
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* doublewords passed to the instruction. The additional facilites
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* are:
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* Bit 43: decimal floating point facility is installed
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* translated to:
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* HWCAP_S390_DFP bit 6.
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*/
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if ((elf_hwcap & (1UL << 2)) &&
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stfle(&facility_list_extended, 1) > 0) {
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if (facility_list_extended & (1ULL << (64 - 43)))
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elf_hwcap |= 1UL << 6;
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}
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switch (cpuinfo->cpu_id.machine) {
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case 0x9672:
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#if !defined(CONFIG_64BIT)
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default: /* Use "g5" as default for 31 bit kernels. */
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#endif
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strcpy(elf_platform, "g5");
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break;
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case 0x2064:
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case 0x2066:
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#if defined(CONFIG_64BIT)
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default: /* Use "z900" as default for 64 bit kernels. */
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#endif
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strcpy(elf_platform, "z900");
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break;
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case 0x2084:
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case 0x2086:
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strcpy(elf_platform, "z990");
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break;
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case 0x2094:
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strcpy(elf_platform, "z9-109");
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break;
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}
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}
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/*
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* Setup function called from init/main.c just after the banner
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* was printed.
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@ -804,6 +898,11 @@ setup_arch(char **cmdline_p)
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__cpu_logical_map[0] = S390_lowcore.cpu_data.cpu_addr;
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smp_setup_cpu_possible_map();
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/*
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* Setup capabilities (ELF_HWCAP & ELF_PLATFORM).
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*/
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setup_hwcaps();
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/*
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* Create kernel page tables and switch to virtual addressing.
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*/
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@ -839,8 +938,12 @@ void print_cpu_info(struct cpuinfo_S390 *cpuinfo)
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static int show_cpuinfo(struct seq_file *m, void *v)
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{
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static const char *hwcap_str[7] = {
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"esan3", "zarch", "stfle", "msa", "ldisp", "eimm", "dfp"
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};
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struct cpuinfo_S390 *cpuinfo;
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unsigned long n = (unsigned long) v - 1;
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int i;
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s390_adjust_jiffies();
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preempt_disable();
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@ -850,7 +953,13 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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"bogomips per cpu: %lu.%02lu\n",
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num_online_cpus(), loops_per_jiffy/(500000/HZ),
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(loops_per_jiffy/(5000/HZ))%100);
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seq_puts(m, "features\t: ");
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for (i = 0; i < 7; i++)
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if (hwcap_str[i] && (elf_hwcap & (1UL << i)))
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seq_printf(m, "%s ", hwcap_str[i]);
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seq_puts(m, "\n");
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}
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if (cpu_online(n)) {
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#ifdef CONFIG_SMP
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if (smp_processor_id() == n)
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@ -188,7 +188,8 @@ static inline int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpregs)
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/* This yields a mask that user programs can use to figure out what
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instruction set this CPU supports. */
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#define ELF_HWCAP (0)
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extern unsigned long elf_hwcap;
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#define ELF_HWCAP (elf_hwcap)
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/* This yields a string that ld.so will use to load implementation
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specific libraries for optimization. This is more specific in
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@ -197,7 +198,9 @@ static inline int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpregs)
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For the moment, we have only optimizations for the Intel generations,
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but that could change... */
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#define ELF_PLATFORM (NULL)
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#define ELF_PLATFORM_SIZE 8
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extern char elf_platform[];
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#define ELF_PLATFORM (elf_platform)
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#ifndef __s390x__
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#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
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@ -229,17 +229,19 @@ struct _lowcore
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__u16 subchannel_nr; /* 0x0ba */
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__u32 io_int_parm; /* 0x0bc */
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__u32 io_int_word; /* 0x0c0 */
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__u8 pad3[0xD4-0xC4]; /* 0x0c4 */
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__u8 pad3[0xc8-0xc4]; /* 0x0c4 */
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__u32 stfl_fac_list; /* 0x0c8 */
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__u8 pad4[0xd4-0xcc]; /* 0x0cc */
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__u32 extended_save_area_addr; /* 0x0d4 */
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__u32 cpu_timer_save_area[2]; /* 0x0d8 */
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__u32 clock_comp_save_area[2]; /* 0x0e0 */
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__u32 mcck_interruption_code[2]; /* 0x0e8 */
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__u8 pad4[0xf4-0xf0]; /* 0x0f0 */
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__u8 pad5[0xf4-0xf0]; /* 0x0f0 */
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__u32 external_damage_code; /* 0x0f4 */
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__u32 failing_storage_address; /* 0x0f8 */
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__u8 pad5[0x100-0xfc]; /* 0x0fc */
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__u8 pad6[0x100-0xfc]; /* 0x0fc */
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__u32 st_status_fixed_logout[4];/* 0x100 */
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__u8 pad6[0x120-0x110]; /* 0x110 */
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__u8 pad7[0x120-0x110]; /* 0x110 */
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__u32 access_regs_save_area[16];/* 0x120 */
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__u32 floating_pt_save_area[8]; /* 0x160 */
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__u32 gpregs_save_area[16]; /* 0x180 */
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