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IB/mlx5: Add CQE version 1 support to user QPs and SRQs
Enforce working with CQE version 1 when the user supports CQE version 1 and asked to work this way. If the user still works with CQE version 0, then use the default CQE version to tell the Firmware that the user still works in the older mode. After this patch, the kernel still reports CQE version 0. Signed-off-by: Haggai Abramovsky <hagaya@mellanox.com> Reviewed-by: Matan Barak <matanb@mellanox.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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@ -57,6 +57,8 @@ pr_warn("%s:%s:%d:(pid %d): " format, (dev)->ib_dev.name, __func__, \
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#define field_avail(type, fld, sz) (offsetof(type, fld) + \
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sizeof(((type *)0)->fld) <= (sz))
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#define MLX5_IB_DEFAULT_UIDX 0xffffff
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#define MLX5_USER_ASSIGNED_UIDX_MASK __mlx5_mask(qpc, user_index)
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enum {
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MLX5_IB_MMAP_CMD_SHIFT = 8,
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@ -94,6 +96,11 @@ enum {
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MLX5_CROSS_CHANNEL_UUAR = 0,
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};
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enum {
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MLX5_CQE_VERSION_V0,
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MLX5_CQE_VERSION_V1,
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};
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struct mlx5_ib_ucontext {
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struct ib_ucontext ibucontext;
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struct list_head db_page_list;
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@ -102,6 +109,7 @@ struct mlx5_ib_ucontext {
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*/
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struct mutex db_page_mutex;
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struct mlx5_uuar_info uuari;
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u8 cqe_version;
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};
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static inline struct mlx5_ib_ucontext *to_mucontext(struct ib_ucontext *ibucontext)
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@ -694,4 +702,19 @@ static inline u32 check_cq_create_flags(u32 flags)
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*/
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return (flags & ~IB_CQ_FLAGS_IGNORE_OVERRUN);
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}
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static inline int verify_assign_uidx(u8 cqe_version, u32 cmd_uidx,
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u32 *user_index)
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{
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if (cqe_version) {
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if ((cmd_uidx == MLX5_IB_DEFAULT_UIDX) ||
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(cmd_uidx & ~MLX5_USER_ASSIGNED_UIDX_MASK))
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return -EINVAL;
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*user_index = cmd_uidx;
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} else {
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*user_index = MLX5_IB_DEFAULT_UIDX;
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}
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return 0;
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}
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#endif /* MLX5_IB_H */
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@ -33,6 +33,7 @@
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#include <linux/module.h>
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#include <rdma/ib_umem.h>
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#include <rdma/ib_cache.h>
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#include <rdma/ib_user_verbs.h>
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#include "mlx5_ib.h"
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#include "user.h"
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@ -870,6 +871,8 @@ static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd,
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struct mlx5_ib_create_qp ucmd;
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int inlen = sizeof(*in);
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int err;
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u32 uidx = MLX5_IB_DEFAULT_UIDX;
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void *qpc;
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mlx5_ib_odp_create_qp(qp);
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@ -910,6 +913,11 @@ static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd,
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return -EFAULT;
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}
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err = get_qp_user_index(to_mucontext(pd->uobject->context),
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&ucmd, udata->inlen, &uidx);
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if (err)
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return err;
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qp->wq_sig = !!(ucmd.flags & MLX5_QP_FLAG_SIGNATURE);
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qp->scat_cqe = !!(ucmd.flags & MLX5_QP_FLAG_SCATTER_CQE);
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} else {
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@ -1046,6 +1054,12 @@ static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd,
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in->ctx.db_rec_addr = cpu_to_be64(qp->db.dma);
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if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1) {
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qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
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/* 0xffffff means we ask to work with cqe version 0 */
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MLX5_SET(qpc, qpc, user_index, uidx);
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}
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err = mlx5_core_create_qp(dev->mdev, &qp->mqp, in, inlen);
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if (err) {
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mlx5_ib_dbg(dev, "create qp failed\n");
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@ -78,28 +78,41 @@ static int create_srq_user(struct ib_pd *pd, struct mlx5_ib_srq *srq,
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struct ib_udata *udata, int buf_size, int *inlen)
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{
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struct mlx5_ib_dev *dev = to_mdev(pd->device);
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struct mlx5_ib_create_srq ucmd;
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struct mlx5_ib_create_srq ucmd = {};
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size_t ucmdlen;
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void *xsrqc;
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int err;
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int npages;
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int page_shift;
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int ncont;
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u32 offset;
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u32 uidx = MLX5_IB_DEFAULT_UIDX;
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int drv_data = udata->inlen - sizeof(struct ib_uverbs_cmd_hdr);
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ucmdlen =
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(udata->inlen - sizeof(struct ib_uverbs_cmd_hdr) <
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sizeof(ucmd)) ? (sizeof(ucmd) -
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sizeof(ucmd.reserved)) : sizeof(ucmd);
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if (drv_data < 0)
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return -EINVAL;
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ucmdlen = (drv_data < sizeof(ucmd)) ?
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drv_data : sizeof(ucmd);
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if (ib_copy_from_udata(&ucmd, udata, ucmdlen)) {
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mlx5_ib_dbg(dev, "failed copy udata\n");
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return -EFAULT;
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}
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if (ucmdlen == sizeof(ucmd) &&
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ucmd.reserved != 0)
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if (ucmd.reserved0 || ucmd.reserved1)
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return -EINVAL;
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if (drv_data > sizeof(ucmd) &&
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!ib_is_udata_cleared(udata, sizeof(ucmd),
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drv_data - sizeof(ucmd)))
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return -EINVAL;
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err = get_srq_user_index(to_mucontext(pd->uobject->context),
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&ucmd, udata->inlen, &uidx);
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if (err)
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return err;
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srq->wq_sig = !!(ucmd.flags & MLX5_SRQ_FLAG_SIGNATURE);
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srq->umem = ib_umem_get(pd->uobject->context, ucmd.buf_addr, buf_size,
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@ -138,6 +151,12 @@ static int create_srq_user(struct ib_pd *pd, struct mlx5_ib_srq *srq,
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(*in)->ctx.log_pg_sz = page_shift - MLX5_ADAPTER_PAGE_SHIFT;
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(*in)->ctx.pgoff_cqn = cpu_to_be32(offset << 26);
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if (MLX5_CAP_GEN(dev->mdev, cqe_version) == MLX5_CQE_VERSION_V1) {
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xsrqc = MLX5_ADDR_OF(create_xrc_srq_in, *in,
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xrc_srq_context_entry);
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MLX5_SET(xrc_srqc, xsrqc, user_index, uidx);
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}
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return 0;
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err_in:
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@ -158,6 +177,7 @@ static int create_srq_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_srq *srq,
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struct mlx5_wqe_srq_next_seg *next;
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int page_shift;
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int npages;
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void *xsrqc;
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err = mlx5_db_alloc(dev->mdev, &srq->db);
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if (err) {
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@ -204,6 +224,13 @@ static int create_srq_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_srq *srq,
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(*in)->ctx.log_pg_sz = page_shift - MLX5_ADAPTER_PAGE_SHIFT;
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if (MLX5_CAP_GEN(dev->mdev, cqe_version) == MLX5_CQE_VERSION_V1) {
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xsrqc = MLX5_ADDR_OF(create_xrc_srq_in, *in,
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xrc_srq_context_entry);
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/* 0xffffff means we ask to work with cqe version 0 */
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MLX5_SET(xrc_srqc, xsrqc, user_index, MLX5_IB_DEFAULT_UIDX);
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}
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return 0;
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err_in:
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@ -35,6 +35,8 @@
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#include <linux/types.h>
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#include "mlx5_ib.h"
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enum {
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MLX5_QP_FLAG_SIGNATURE = 1 << 0,
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MLX5_QP_FLAG_SCATTER_CQE = 1 << 1,
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@ -118,7 +120,9 @@ struct mlx5_ib_create_srq {
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__u64 buf_addr;
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__u64 db_addr;
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__u32 flags;
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__u32 reserved; /* explicit padding (optional on i386) */
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__u32 reserved0; /* explicit padding (optional on i386) */
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__u32 uidx;
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__u32 reserved1;
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};
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struct mlx5_ib_create_srq_resp {
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@ -133,9 +137,47 @@ struct mlx5_ib_create_qp {
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__u32 rq_wqe_count;
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__u32 rq_wqe_shift;
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__u32 flags;
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__u32 uidx;
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__u32 reserved0;
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};
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struct mlx5_ib_create_qp_resp {
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__u32 uuar_index;
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};
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static inline int get_qp_user_index(struct mlx5_ib_ucontext *ucontext,
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struct mlx5_ib_create_qp *ucmd,
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int inlen,
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u32 *user_index)
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{
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u8 cqe_version = ucontext->cqe_version;
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if (field_avail(struct mlx5_ib_create_qp, uidx, inlen) &&
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!cqe_version && (ucmd->uidx == MLX5_IB_DEFAULT_UIDX))
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return 0;
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if (!!(field_avail(struct mlx5_ib_create_qp, uidx, inlen) !=
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!!cqe_version))
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return -EINVAL;
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return verify_assign_uidx(cqe_version, ucmd->uidx, user_index);
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}
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static inline int get_srq_user_index(struct mlx5_ib_ucontext *ucontext,
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struct mlx5_ib_create_srq *ucmd,
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int inlen,
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u32 *user_index)
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{
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u8 cqe_version = ucontext->cqe_version;
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if (field_avail(struct mlx5_ib_create_srq, uidx, inlen) &&
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!cqe_version && (ucmd->uidx == MLX5_IB_DEFAULT_UIDX))
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return 0;
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if (!!(field_avail(struct mlx5_ib_create_srq, uidx, inlen) !=
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!!cqe_version))
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return -EINVAL;
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return verify_assign_uidx(cqe_version, ucmd->uidx, user_index);
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}
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#endif /* MLX5_IB_USER_H */
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@ -696,7 +696,6 @@ clean:
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return err;
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}
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#ifdef CONFIG_MLX5_CORE_EN
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static int mlx5_core_set_issi(struct mlx5_core_dev *dev)
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{
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u32 query_in[MLX5_ST_SZ_DW(query_issi_in)];
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@ -749,7 +748,6 @@ static int mlx5_core_set_issi(struct mlx5_core_dev *dev)
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return -ENOTSUPP;
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}
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#endif
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static int map_bf_area(struct mlx5_core_dev *dev)
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{
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@ -995,13 +993,11 @@ static int mlx5_load_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv)
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goto err_pagealloc_cleanup;
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}
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#ifdef CONFIG_MLX5_CORE_EN
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err = mlx5_core_set_issi(dev);
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if (err) {
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dev_err(&pdev->dev, "failed to set issi\n");
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goto err_disable_hca;
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}
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#endif
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err = mlx5_satisfy_startup_pages(dev, 1);
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if (err) {
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@ -187,17 +187,10 @@ int mlx5_core_create_qp(struct mlx5_core_dev *dev,
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struct mlx5_destroy_qp_mbox_in din;
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struct mlx5_destroy_qp_mbox_out dout;
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int err;
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void *qpc;
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memset(&out, 0, sizeof(out));
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in->hdr.opcode = cpu_to_be16(MLX5_CMD_OP_CREATE_QP);
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if (dev->issi) {
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qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
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/* 0xffffff means we ask to work with cqe version 0 */
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MLX5_SET(qpc, qpc, user_index, 0xffffff);
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}
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err = mlx5_cmd_exec(dev, in, inlen, &out, sizeof(out));
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if (err) {
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mlx5_core_warn(dev, "ret %d\n", err);
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@ -241,8 +241,6 @@ static int create_xrc_srq_cmd(struct mlx5_core_dev *dev,
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memcpy(xrc_srqc, srqc, MLX5_ST_SZ_BYTES(srqc));
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memcpy(pas, in->pas, pas_size);
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/* 0xffffff means we ask to work with cqe version 0 */
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MLX5_SET(xrc_srqc, xrc_srqc, user_index, 0xffffff);
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MLX5_SET(create_xrc_srq_in, create_in, opcode,
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MLX5_CMD_OP_CREATE_XRC_SRQ);
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