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drm/radeon: switch get_gpu_clock() to a callback (v2)
Cleans up the code for future asics v2: rebase, fix some missing radeon_asic updates Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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d041889414
@ -4461,14 +4461,14 @@ static void r600_pcie_gen2_enable(struct radeon_device *rdev)
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}
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/**
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* r600_get_gpu_clock - return GPU clock counter snapshot
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* r600_get_gpu_clock_counter - return GPU clock counter snapshot
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*
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* @rdev: radeon_device pointer
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*
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* Fetches a GPU clock counter snapshot (R6xx-cayman).
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* Returns the 64 bit clock counter snapshot.
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*/
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uint64_t r600_get_gpu_clock(struct radeon_device *rdev)
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uint64_t r600_get_gpu_clock_counter(struct radeon_device *rdev)
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{
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uint64_t clock;
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@ -1181,6 +1181,8 @@ struct radeon_asic {
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int (*mc_wait_for_idle)(struct radeon_device *rdev);
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/* get the reference clock */
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u32 (*get_xclk)(struct radeon_device *rdev);
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/* get the gpu clock counter */
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uint64_t (*get_gpu_clock_counter)(struct radeon_device *rdev);
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/* gart */
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struct {
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void (*tlb_flush)(struct radeon_device *rdev);
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@ -1863,6 +1865,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
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#define radeon_wait_for_vblank(rdev, crtc) (rdev)->asic->display.wait_for_vblank((rdev), (crtc))
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#define radeon_mc_wait_for_idle(rdev) (rdev)->asic->mc_wait_for_idle((rdev))
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#define radeon_get_xclk(rdev) (rdev)->asic->get_xclk((rdev))
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#define radeon_get_gpu_clock_counter(rdev) (rdev)->asic->get_gpu_clock_counter((rdev))
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/* Common functions */
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/* AGP */
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@ -935,6 +935,7 @@ static struct radeon_asic r600_asic = {
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.gui_idle = &r600_gui_idle,
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.mc_wait_for_idle = &r600_mc_wait_for_idle,
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.get_xclk = &r600_get_xclk,
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.get_gpu_clock_counter = &r600_get_gpu_clock_counter,
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.gart = {
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.tlb_flush = &r600_pcie_gart_tlb_flush,
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.set_page = &rs600_gart_set_page,
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@ -1020,6 +1021,7 @@ static struct radeon_asic rs780_asic = {
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.gui_idle = &r600_gui_idle,
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.mc_wait_for_idle = &r600_mc_wait_for_idle,
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.get_xclk = &r600_get_xclk,
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.get_gpu_clock_counter = &r600_get_gpu_clock_counter,
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.gart = {
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.tlb_flush = &r600_pcie_gart_tlb_flush,
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.set_page = &rs600_gart_set_page,
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@ -1105,6 +1107,7 @@ static struct radeon_asic rv770_asic = {
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.gui_idle = &r600_gui_idle,
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.mc_wait_for_idle = &r600_mc_wait_for_idle,
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.get_xclk = &rv770_get_xclk,
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.get_gpu_clock_counter = &r600_get_gpu_clock_counter,
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.gart = {
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.tlb_flush = &r600_pcie_gart_tlb_flush,
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.set_page = &rs600_gart_set_page,
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@ -1190,6 +1193,7 @@ static struct radeon_asic evergreen_asic = {
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.gui_idle = &r600_gui_idle,
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.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
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.get_xclk = &rv770_get_xclk,
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.get_gpu_clock_counter = &r600_get_gpu_clock_counter,
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.gart = {
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.tlb_flush = &evergreen_pcie_gart_tlb_flush,
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.set_page = &rs600_gart_set_page,
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@ -1275,6 +1279,7 @@ static struct radeon_asic sumo_asic = {
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.gui_idle = &r600_gui_idle,
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.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
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.get_xclk = &r600_get_xclk,
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.get_gpu_clock_counter = &r600_get_gpu_clock_counter,
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.gart = {
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.tlb_flush = &evergreen_pcie_gart_tlb_flush,
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.set_page = &rs600_gart_set_page,
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@ -1360,6 +1365,7 @@ static struct radeon_asic btc_asic = {
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.gui_idle = &r600_gui_idle,
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.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
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.get_xclk = &rv770_get_xclk,
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.get_gpu_clock_counter = &r600_get_gpu_clock_counter,
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.gart = {
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.tlb_flush = &evergreen_pcie_gart_tlb_flush,
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.set_page = &rs600_gart_set_page,
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@ -1445,6 +1451,7 @@ static struct radeon_asic cayman_asic = {
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.gui_idle = &r600_gui_idle,
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.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
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.get_xclk = &rv770_get_xclk,
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.get_gpu_clock_counter = &r600_get_gpu_clock_counter,
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.gart = {
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.tlb_flush = &cayman_pcie_gart_tlb_flush,
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.set_page = &rs600_gart_set_page,
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@ -1573,6 +1580,7 @@ static struct radeon_asic trinity_asic = {
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.gui_idle = &r600_gui_idle,
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.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
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.get_xclk = &r600_get_xclk,
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.get_gpu_clock_counter = &r600_get_gpu_clock_counter,
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.gart = {
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.tlb_flush = &cayman_pcie_gart_tlb_flush,
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.set_page = &rs600_gart_set_page,
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@ -1701,6 +1709,7 @@ static struct radeon_asic si_asic = {
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.gui_idle = &r600_gui_idle,
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.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
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.get_xclk = &si_get_xclk,
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.get_gpu_clock_counter = &si_get_gpu_clock_counter,
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.gart = {
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.tlb_flush = &si_pcie_gart_tlb_flush,
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.set_page = &rs600_gart_set_page,
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@ -389,8 +389,8 @@ void r600_kms_blit_copy(struct radeon_device *rdev,
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unsigned num_gpu_pages,
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struct radeon_sa_bo *vb);
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int r600_mc_wait_for_idle(struct radeon_device *rdev);
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uint64_t r600_get_gpu_clock(struct radeon_device *rdev);
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u32 r600_get_xclk(struct radeon_device *rdev);
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uint64_t r600_get_gpu_clock_counter(struct radeon_device *rdev);
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/*
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* rv770,rv730,rv710,rv740
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@ -517,12 +517,12 @@ void si_vm_set_page(struct radeon_device *rdev,
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uint32_t incr, uint32_t flags);
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void si_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm);
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int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib);
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uint64_t si_get_gpu_clock(struct radeon_device *rdev);
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int si_copy_dma(struct radeon_device *rdev,
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uint64_t src_offset, uint64_t dst_offset,
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unsigned num_gpu_pages,
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struct radeon_fence **fence);
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void si_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm);
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u32 si_get_xclk(struct radeon_device *rdev);
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uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev);
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#endif
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@ -185,11 +185,7 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
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if (info->request == RADEON_INFO_TIMESTAMP) {
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if (rdev->family >= CHIP_R600) {
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value_ptr64 = (uint64_t*)((unsigned long)info->value);
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if (rdev->family >= CHIP_TAHITI) {
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value64 = si_get_gpu_clock(rdev);
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} else {
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value64 = r600_get_gpu_clock(rdev);
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}
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value64 = radeon_get_gpu_clock_counter(rdev);
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if (DRM_COPY_TO_USER(value_ptr64, &value64, sizeof(value64))) {
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DRM_ERROR("copy_to_user %s:%u\n", __func__, __LINE__);
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@ -4609,14 +4609,14 @@ void si_fini(struct radeon_device *rdev)
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}
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/**
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* si_get_gpu_clock - return GPU clock counter snapshot
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* si_get_gpu_clock_counter - return GPU clock counter snapshot
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*
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* @rdev: radeon_device pointer
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*
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* Fetches a GPU clock counter snapshot (SI).
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* Returns the 64 bit clock counter snapshot.
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*/
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uint64_t si_get_gpu_clock(struct radeon_device *rdev)
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uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev)
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{
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uint64_t clock;
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