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sh: move sh asm/clock.h contents to linux/sh_clk.h V2
This patch is V2 of the clock framework move from arch/sh/include/asm/clock.h to include/linux/sh_clk.h and updates the include paths for files that will be shared between SH and SH-Mobile ARM. The file asm/clock.h is still kept in this version, this to depend on as few files as possible at this point. We keep SH specific stuff in there. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Magnus Damm
Paul Mundt
parent
441c2440ab
commit
d28bdf05f7
@ -1,158 +1,13 @@
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#ifndef __ASM_SH_CLOCK_H
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#define __ASM_SH_CLOCK_H
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#include <linux/list.h>
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#include <linux/seq_file.h>
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#include <linux/cpufreq.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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struct clk;
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struct clk_ops {
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void (*init)(struct clk *clk);
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int (*enable)(struct clk *clk);
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void (*disable)(struct clk *clk);
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unsigned long (*recalc)(struct clk *clk);
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int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
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int (*set_parent)(struct clk *clk, struct clk *parent);
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long (*round_rate)(struct clk *clk, unsigned long rate);
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};
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struct clk {
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struct list_head node;
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const char *name;
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int id;
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struct clk *parent;
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struct clk_ops *ops;
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struct list_head children;
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struct list_head sibling; /* node for children */
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int usecount;
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unsigned long rate;
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unsigned long flags;
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void __iomem *enable_reg;
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unsigned int enable_bit;
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unsigned long arch_flags;
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void *priv;
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struct dentry *dentry;
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struct cpufreq_frequency_table *freq_table;
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};
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#define CLK_ENABLE_ON_INIT (1 << 0)
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#include <linux/sh_clk.h>
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/* Should be defined by processor-specific code */
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void __deprecated arch_init_clk_ops(struct clk_ops **, int type);
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int __init arch_clk_init(void);
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/* arch/sh/kernel/cpu/clock.c */
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int clk_init(void);
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unsigned long followparent_recalc(struct clk *);
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void recalculate_root_clocks(void);
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void propagate_rate(struct clk *);
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int clk_reparent(struct clk *child, struct clk *parent);
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int clk_register(struct clk *);
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void clk_unregister(struct clk *);
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/* arch/sh/kernel/cpu/clock-cpg.c */
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int __init __deprecated cpg_clk_init(void);
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/* the exported API, in addition to clk_set_rate */
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/**
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* clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
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* @clk: clock source
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* @rate: desired clock rate in Hz
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* @algo_id: algorithm id to be passed down to ops->set_rate
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*
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* Returns success (0) or negative errno.
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*/
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int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);
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enum clk_sh_algo_id {
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NO_CHANGE = 0,
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IUS_N1_N1,
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IUS_322,
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IUS_522,
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IUS_N11,
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SB_N1,
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SB3_N1,
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SB3_32,
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SB3_43,
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SB3_54,
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BP_N1,
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IP_N1,
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};
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struct clk_div_mult_table {
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unsigned int *divisors;
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unsigned int nr_divisors;
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unsigned int *multipliers;
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unsigned int nr_multipliers;
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};
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struct cpufreq_frequency_table;
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void clk_rate_table_build(struct clk *clk,
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struct cpufreq_frequency_table *freq_table,
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int nr_freqs,
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struct clk_div_mult_table *src_table,
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unsigned long *bitmap);
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long clk_rate_table_round(struct clk *clk,
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struct cpufreq_frequency_table *freq_table,
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unsigned long rate);
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int clk_rate_table_find(struct clk *clk,
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struct cpufreq_frequency_table *freq_table,
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unsigned long rate);
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#define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags) \
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{ \
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.parent = _parent, \
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.enable_reg = (void __iomem *)_enable_reg, \
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.enable_bit = _enable_bit, \
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.flags = _flags, \
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}
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int sh_clk_mstp32_register(struct clk *clks, int nr);
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#define SH_CLK_DIV4(_parent, _reg, _shift, _div_bitmap, _flags) \
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{ \
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.parent = _parent, \
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.enable_reg = (void __iomem *)_reg, \
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.enable_bit = _shift, \
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.arch_flags = _div_bitmap, \
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.flags = _flags, \
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}
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struct clk_div4_table {
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struct clk_div_mult_table *div_mult_table;
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void (*kick)(struct clk *clk);
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};
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int sh_clk_div4_register(struct clk *clks, int nr,
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struct clk_div4_table *table);
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int sh_clk_div4_enable_register(struct clk *clks, int nr,
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struct clk_div4_table *table);
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int sh_clk_div4_reparent_register(struct clk *clks, int nr,
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struct clk_div4_table *table);
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#define SH_CLK_DIV6(_parent, _reg, _flags) \
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{ \
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.parent = _parent, \
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.enable_reg = (void __iomem *)_reg, \
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.flags = _flags, \
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}
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int sh_clk_div6_register(struct clk *clks, int nr);
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#endif /* __ASM_SH_CLOCK_H */
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151
include/linux/sh_clk.h
Normal file
151
include/linux/sh_clk.h
Normal file
@ -0,0 +1,151 @@
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#ifndef __SH_CLOCK_H
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#define __SH_CLOCK_H
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#include <linux/list.h>
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#include <linux/seq_file.h>
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#include <linux/cpufreq.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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struct clk;
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struct clk_ops {
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void (*init)(struct clk *clk);
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int (*enable)(struct clk *clk);
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void (*disable)(struct clk *clk);
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unsigned long (*recalc)(struct clk *clk);
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int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
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int (*set_parent)(struct clk *clk, struct clk *parent);
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long (*round_rate)(struct clk *clk, unsigned long rate);
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};
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struct clk {
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struct list_head node;
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const char *name;
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int id;
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struct clk *parent;
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struct clk_ops *ops;
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struct list_head children;
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struct list_head sibling; /* node for children */
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int usecount;
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unsigned long rate;
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unsigned long flags;
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void __iomem *enable_reg;
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unsigned int enable_bit;
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unsigned long arch_flags;
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void *priv;
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struct dentry *dentry;
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struct cpufreq_frequency_table *freq_table;
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};
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#define CLK_ENABLE_ON_INIT (1 << 0)
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/* arch/sh/kernel/cpu/clock.c */
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int clk_init(void);
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unsigned long followparent_recalc(struct clk *);
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void recalculate_root_clocks(void);
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void propagate_rate(struct clk *);
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int clk_reparent(struct clk *child, struct clk *parent);
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int clk_register(struct clk *);
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void clk_unregister(struct clk *);
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/* the exported API, in addition to clk_set_rate */
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/**
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* clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
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* @clk: clock source
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* @rate: desired clock rate in Hz
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* @algo_id: algorithm id to be passed down to ops->set_rate
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*
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* Returns success (0) or negative errno.
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*/
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int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);
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enum clk_sh_algo_id {
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NO_CHANGE = 0,
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IUS_N1_N1,
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IUS_322,
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IUS_522,
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IUS_N11,
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SB_N1,
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SB3_N1,
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SB3_32,
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SB3_43,
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SB3_54,
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BP_N1,
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IP_N1,
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};
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struct clk_div_mult_table {
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unsigned int *divisors;
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unsigned int nr_divisors;
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unsigned int *multipliers;
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unsigned int nr_multipliers;
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};
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struct cpufreq_frequency_table;
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void clk_rate_table_build(struct clk *clk,
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struct cpufreq_frequency_table *freq_table,
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int nr_freqs,
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struct clk_div_mult_table *src_table,
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unsigned long *bitmap);
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long clk_rate_table_round(struct clk *clk,
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struct cpufreq_frequency_table *freq_table,
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unsigned long rate);
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int clk_rate_table_find(struct clk *clk,
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struct cpufreq_frequency_table *freq_table,
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unsigned long rate);
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#define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags) \
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{ \
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.parent = _parent, \
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.enable_reg = (void __iomem *)_enable_reg, \
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.enable_bit = _enable_bit, \
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.flags = _flags, \
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}
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int sh_clk_mstp32_register(struct clk *clks, int nr);
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#define SH_CLK_DIV4(_parent, _reg, _shift, _div_bitmap, _flags) \
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{ \
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.parent = _parent, \
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.enable_reg = (void __iomem *)_reg, \
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.enable_bit = _shift, \
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.arch_flags = _div_bitmap, \
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.flags = _flags, \
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}
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struct clk_div4_table {
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struct clk_div_mult_table *div_mult_table;
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void (*kick)(struct clk *clk);
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};
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int sh_clk_div4_register(struct clk *clks, int nr,
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struct clk_div4_table *table);
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int sh_clk_div4_enable_register(struct clk *clks, int nr,
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struct clk_div4_table *table);
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int sh_clk_div4_reparent_register(struct clk *clks, int nr,
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struct clk_div4_table *table);
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#define SH_CLK_DIV6(_parent, _reg, _flags) \
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{ \
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.parent = _parent, \
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.enable_reg = (void __iomem *)_reg, \
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.flags = _flags, \
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}
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int sh_clk_div6_register(struct clk *clks, int nr);
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#endif /* __SH_CLOCK_H */
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