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KVM: unify part of generic timer handling
Hide the internals of vcpu awakening / injection from the in-kernel emulated timers. This makes future changes in this logic easier and decreases the distance to more generic timer handling. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
parent
fd66842370
commit
d3c7b77d1a
@ -14,7 +14,7 @@ endif
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EXTRA_CFLAGS += -Ivirt/kvm -Iarch/x86/kvm
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kvm-objs := $(common-objs) x86.o mmu.o x86_emulate.o i8259.o irq.o lapic.o \
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i8254.o
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i8254.o timer.o
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obj-$(CONFIG_KVM) += kvm.o
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kvm-intel-objs = vmx.o
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obj-$(CONFIG_KVM_INTEL) += kvm-intel.o
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@ -219,25 +219,6 @@ static void pit_latch_status(struct kvm *kvm, int channel)
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}
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}
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static int __pit_timer_fn(struct kvm_kpit_state *ps)
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{
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struct kvm_vcpu *vcpu0 = ps->pit->kvm->vcpus[0];
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struct kvm_kpit_timer *pt = &ps->pit_timer;
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if (!atomic_inc_and_test(&pt->pending))
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set_bit(KVM_REQ_PENDING_TIMER, &vcpu0->requests);
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if (!pt->reinject)
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atomic_set(&pt->pending, 1);
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if (vcpu0 && waitqueue_active(&vcpu0->wq))
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wake_up_interruptible(&vcpu0->wq);
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hrtimer_add_expires_ns(&pt->timer, pt->period);
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return (pt->period == 0 ? 0 : 1);
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}
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int pit_has_pending_timer(struct kvm_vcpu *vcpu)
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{
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struct kvm_pit *pit = vcpu->kvm->arch.vpit;
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@ -258,21 +239,6 @@ static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian)
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spin_unlock(&ps->inject_lock);
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}
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static enum hrtimer_restart pit_timer_fn(struct hrtimer *data)
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{
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struct kvm_kpit_state *ps;
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int restart_timer = 0;
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ps = container_of(data, struct kvm_kpit_state, pit_timer.timer);
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restart_timer = __pit_timer_fn(ps);
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if (restart_timer)
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return HRTIMER_RESTART;
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else
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return HRTIMER_NORESTART;
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}
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void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu)
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{
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struct kvm_pit *pit = vcpu->kvm->arch.vpit;
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@ -286,15 +252,26 @@ void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu)
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hrtimer_start_expires(timer, HRTIMER_MODE_ABS);
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}
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static void destroy_pit_timer(struct kvm_kpit_timer *pt)
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static void destroy_pit_timer(struct kvm_timer *pt)
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{
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pr_debug("pit: execute del timer!\n");
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hrtimer_cancel(&pt->timer);
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}
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static bool kpit_is_periodic(struct kvm_timer *ktimer)
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{
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struct kvm_kpit_state *ps = container_of(ktimer, struct kvm_kpit_state,
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pit_timer);
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return ps->is_periodic;
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}
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struct kvm_timer_ops kpit_ops = {
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.is_periodic = kpit_is_periodic,
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};
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static void create_pit_timer(struct kvm_kpit_state *ps, u32 val, int is_period)
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{
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struct kvm_kpit_timer *pt = &ps->pit_timer;
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struct kvm_timer *pt = &ps->pit_timer;
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s64 interval;
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interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ);
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@ -304,7 +281,13 @@ static void create_pit_timer(struct kvm_kpit_state *ps, u32 val, int is_period)
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/* TODO The new value only affected after the retriggered */
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hrtimer_cancel(&pt->timer);
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pt->period = (is_period == 0) ? 0 : interval;
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pt->timer.function = pit_timer_fn;
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ps->is_periodic = is_period;
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pt->timer.function = kvm_timer_fn;
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pt->t_ops = &kpit_ops;
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pt->kvm = ps->pit->kvm;
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pt->vcpu_id = 0;
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atomic_set(&pt->pending, 0);
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ps->irq_ack = 1;
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@ -3,14 +3,6 @@
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#include "iodev.h"
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struct kvm_kpit_timer {
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struct hrtimer timer;
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int irq;
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s64 period; /* unit: ns */
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atomic_t pending;
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bool reinject;
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};
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struct kvm_kpit_channel_state {
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u32 count; /* can be 65536 */
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u16 latched_count;
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@ -29,7 +21,8 @@ struct kvm_kpit_channel_state {
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struct kvm_kpit_state {
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struct kvm_kpit_channel_state channels[3];
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struct kvm_kpit_timer pit_timer;
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struct kvm_timer pit_timer;
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bool is_periodic;
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u32 speaker_data_on;
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struct mutex lock;
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struct kvm_pit *pit;
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18
arch/x86/kvm/kvm_timer.h
Normal file
18
arch/x86/kvm/kvm_timer.h
Normal file
@ -0,0 +1,18 @@
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struct kvm_timer {
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struct hrtimer timer;
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s64 period; /* unit: ns */
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atomic_t pending; /* accumulated triggered timers */
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bool reinject;
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struct kvm_timer_ops *t_ops;
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struct kvm *kvm;
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int vcpu_id;
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};
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struct kvm_timer_ops {
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bool (*is_periodic)(struct kvm_timer *);
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};
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enum hrtimer_restart kvm_timer_fn(struct hrtimer *data);
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@ -528,12 +528,13 @@ static u32 apic_get_tmcct(struct kvm_lapic *apic)
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if (apic_get_reg(apic, APIC_TMICT) == 0)
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return 0;
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remaining = hrtimer_expires_remaining(&apic->timer.dev);
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remaining = hrtimer_expires_remaining(&apic->lapic_timer.timer);
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if (ktime_to_ns(remaining) < 0)
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remaining = ktime_set(0, 0);
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ns = mod_64(ktime_to_ns(remaining), apic->timer.period);
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tmcct = div64_u64(ns, (APIC_BUS_CYCLE_NS * apic->timer.divide_count));
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ns = mod_64(ktime_to_ns(remaining), apic->lapic_timer.period);
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tmcct = div64_u64(ns,
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(APIC_BUS_CYCLE_NS * apic->divide_count));
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return tmcct;
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}
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@ -620,25 +621,25 @@ static void update_divide_count(struct kvm_lapic *apic)
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tdcr = apic_get_reg(apic, APIC_TDCR);
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tmp1 = tdcr & 0xf;
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tmp2 = ((tmp1 & 0x3) | ((tmp1 & 0x8) >> 1)) + 1;
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apic->timer.divide_count = 0x1 << (tmp2 & 0x7);
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apic->divide_count = 0x1 << (tmp2 & 0x7);
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apic_debug("timer divide count is 0x%x\n",
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apic->timer.divide_count);
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apic->lapic_timer.divide_count);
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}
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static void start_apic_timer(struct kvm_lapic *apic)
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{
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ktime_t now = apic->timer.dev.base->get_time();
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ktime_t now = apic->lapic_timer.timer.base->get_time();
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apic->timer.period = apic_get_reg(apic, APIC_TMICT) *
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APIC_BUS_CYCLE_NS * apic->timer.divide_count;
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atomic_set(&apic->timer.pending, 0);
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apic->lapic_timer.period = apic_get_reg(apic, APIC_TMICT) *
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APIC_BUS_CYCLE_NS * apic->divide_count;
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atomic_set(&apic->lapic_timer.pending, 0);
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if (!apic->timer.period)
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if (!apic->lapic_timer.period)
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return;
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hrtimer_start(&apic->timer.dev,
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ktime_add_ns(now, apic->timer.period),
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hrtimer_start(&apic->lapic_timer.timer,
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ktime_add_ns(now, apic->lapic_timer.period),
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HRTIMER_MODE_ABS);
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apic_debug("%s: bus cycle is %" PRId64 "ns, now 0x%016"
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@ -647,9 +648,9 @@ static void start_apic_timer(struct kvm_lapic *apic)
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"expire @ 0x%016" PRIx64 ".\n", __func__,
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APIC_BUS_CYCLE_NS, ktime_to_ns(now),
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apic_get_reg(apic, APIC_TMICT),
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apic->timer.period,
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apic->lapic_timer.period,
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ktime_to_ns(ktime_add_ns(now,
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apic->timer.period)));
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apic->lapic_timer.period)));
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}
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static void apic_manage_nmi_watchdog(struct kvm_lapic *apic, u32 lvt0_val)
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@ -731,7 +732,7 @@ static void apic_mmio_write(struct kvm_io_device *this,
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apic_set_reg(apic, APIC_LVTT + 0x10 * i,
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lvt_val | APIC_LVT_MASKED);
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}
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atomic_set(&apic->timer.pending, 0);
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atomic_set(&apic->lapic_timer.pending, 0);
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}
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break;
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@ -763,7 +764,7 @@ static void apic_mmio_write(struct kvm_io_device *this,
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break;
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case APIC_TMICT:
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hrtimer_cancel(&apic->timer.dev);
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hrtimer_cancel(&apic->lapic_timer.timer);
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apic_set_reg(apic, APIC_TMICT, val);
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start_apic_timer(apic);
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return;
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@ -803,7 +804,7 @@ void kvm_free_lapic(struct kvm_vcpu *vcpu)
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if (!vcpu->arch.apic)
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return;
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hrtimer_cancel(&vcpu->arch.apic->timer.dev);
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hrtimer_cancel(&vcpu->arch.apic->lapic_timer.timer);
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if (vcpu->arch.apic->regs_page)
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__free_page(vcpu->arch.apic->regs_page);
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@ -881,7 +882,7 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu)
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ASSERT(apic != NULL);
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/* Stop the timer in case it's a reset to an active apic */
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hrtimer_cancel(&apic->timer.dev);
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hrtimer_cancel(&apic->lapic_timer.timer);
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apic_set_reg(apic, APIC_ID, vcpu->vcpu_id << 24);
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apic_set_reg(apic, APIC_LVR, APIC_VERSION);
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@ -906,7 +907,7 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu)
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apic_set_reg(apic, APIC_TMR + 0x10 * i, 0);
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}
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update_divide_count(apic);
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atomic_set(&apic->timer.pending, 0);
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atomic_set(&apic->lapic_timer.pending, 0);
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if (vcpu->vcpu_id == 0)
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vcpu->arch.apic_base |= MSR_IA32_APICBASE_BSP;
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apic_update_ppr(apic);
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@ -937,22 +938,11 @@ EXPORT_SYMBOL_GPL(kvm_lapic_enabled);
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*----------------------------------------------------------------------
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*/
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/* TODO: make sure __apic_timer_fn runs in current pCPU */
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static int __apic_timer_fn(struct kvm_lapic *apic)
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static bool lapic_is_periodic(struct kvm_timer *ktimer)
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{
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int result = 0;
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wait_queue_head_t *q = &apic->vcpu->wq;
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if(!atomic_inc_and_test(&apic->timer.pending))
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set_bit(KVM_REQ_PENDING_TIMER, &apic->vcpu->requests);
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if (waitqueue_active(q))
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wake_up_interruptible(q);
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if (apic_lvtt_period(apic)) {
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result = 1;
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hrtimer_add_expires_ns(&apic->timer.dev, apic->timer.period);
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}
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return result;
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struct kvm_lapic *apic = container_of(ktimer, struct kvm_lapic,
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lapic_timer);
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return apic_lvtt_period(apic);
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}
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int apic_has_pending_timer(struct kvm_vcpu *vcpu)
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@ -960,7 +950,7 @@ int apic_has_pending_timer(struct kvm_vcpu *vcpu)
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struct kvm_lapic *lapic = vcpu->arch.apic;
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if (lapic && apic_enabled(lapic) && apic_lvt_enabled(lapic, APIC_LVTT))
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return atomic_read(&lapic->timer.pending);
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return atomic_read(&lapic->lapic_timer.pending);
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return 0;
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}
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@ -987,20 +977,9 @@ void kvm_apic_nmi_wd_deliver(struct kvm_vcpu *vcpu)
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kvm_apic_local_deliver(apic, APIC_LVT0);
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}
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static enum hrtimer_restart apic_timer_fn(struct hrtimer *data)
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{
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struct kvm_lapic *apic;
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int restart_timer = 0;
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apic = container_of(data, struct kvm_lapic, timer.dev);
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restart_timer = __apic_timer_fn(apic);
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if (restart_timer)
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return HRTIMER_RESTART;
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else
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return HRTIMER_NORESTART;
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}
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struct kvm_timer_ops lapic_timer_ops = {
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.is_periodic = lapic_is_periodic,
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};
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int kvm_create_lapic(struct kvm_vcpu *vcpu)
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{
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@ -1025,8 +1004,13 @@ int kvm_create_lapic(struct kvm_vcpu *vcpu)
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memset(apic->regs, 0, PAGE_SIZE);
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apic->vcpu = vcpu;
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hrtimer_init(&apic->timer.dev, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
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apic->timer.dev.function = apic_timer_fn;
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hrtimer_init(&apic->lapic_timer.timer, CLOCK_MONOTONIC,
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HRTIMER_MODE_ABS);
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apic->lapic_timer.timer.function = kvm_timer_fn;
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apic->lapic_timer.t_ops = &lapic_timer_ops;
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apic->lapic_timer.kvm = vcpu->kvm;
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apic->lapic_timer.vcpu_id = vcpu->vcpu_id;
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apic->base_address = APIC_DEFAULT_PHYS_BASE;
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vcpu->arch.apic_base = APIC_DEFAULT_PHYS_BASE;
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@ -1079,9 +1063,9 @@ void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu)
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{
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struct kvm_lapic *apic = vcpu->arch.apic;
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if (apic && atomic_read(&apic->timer.pending) > 0) {
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if (apic && atomic_read(&apic->lapic_timer.pending) > 0) {
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if (kvm_apic_local_deliver(apic, APIC_LVTT))
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atomic_dec(&apic->timer.pending);
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atomic_dec(&apic->lapic_timer.pending);
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}
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}
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@ -1107,7 +1091,7 @@ void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu)
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MSR_IA32_APICBASE_BASE;
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apic_set_reg(apic, APIC_LVR, APIC_VERSION);
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apic_update_ppr(apic);
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hrtimer_cancel(&apic->timer.dev);
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hrtimer_cancel(&apic->lapic_timer.timer);
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update_divide_count(apic);
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start_apic_timer(apic);
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}
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@ -1120,7 +1104,7 @@ void __kvm_migrate_apic_timer(struct kvm_vcpu *vcpu)
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if (!apic)
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return;
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timer = &apic->timer.dev;
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timer = &apic->lapic_timer.timer;
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if (hrtimer_cancel(timer))
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hrtimer_start_expires(timer, HRTIMER_MODE_ABS);
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}
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@ -2,18 +2,15 @@
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#define __KVM_X86_LAPIC_H
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#include "iodev.h"
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#include "kvm_timer.h"
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#include <linux/kvm_host.h>
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struct kvm_lapic {
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unsigned long base_address;
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struct kvm_io_device dev;
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struct {
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atomic_t pending;
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s64 period; /* unit: ns */
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u32 divide_count;
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struct hrtimer dev;
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} timer;
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struct kvm_timer lapic_timer;
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u32 divide_count;
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struct kvm_vcpu *vcpu;
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struct page *regs_page;
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void *regs;
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46
arch/x86/kvm/timer.c
Normal file
46
arch/x86/kvm/timer.c
Normal file
@ -0,0 +1,46 @@
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#include <linux/kvm_host.h>
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#include <linux/kvm.h>
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#include <linux/hrtimer.h>
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#include <asm/atomic.h>
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#include "kvm_timer.h"
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static int __kvm_timer_fn(struct kvm_vcpu *vcpu, struct kvm_timer *ktimer)
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{
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int restart_timer = 0;
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wait_queue_head_t *q = &vcpu->wq;
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/* FIXME: this code should not know anything about vcpus */
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if (!atomic_inc_and_test(&ktimer->pending))
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set_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
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if (!ktimer->reinject)
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atomic_set(&ktimer->pending, 1);
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if (waitqueue_active(q))
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wake_up_interruptible(q);
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if (ktimer->t_ops->is_periodic(ktimer)) {
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hrtimer_add_expires_ns(&ktimer->timer, ktimer->period);
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restart_timer = 1;
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}
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||||
|
||||
return restart_timer;
|
||||
}
|
||||
|
||||
enum hrtimer_restart kvm_timer_fn(struct hrtimer *data)
|
||||
{
|
||||
int restart_timer;
|
||||
struct kvm_vcpu *vcpu;
|
||||
struct kvm_timer *ktimer = container_of(data, struct kvm_timer, timer);
|
||||
|
||||
vcpu = ktimer->kvm->vcpus[ktimer->vcpu_id];
|
||||
if (!vcpu)
|
||||
return HRTIMER_NORESTART;
|
||||
|
||||
restart_timer = __kvm_timer_fn(vcpu, ktimer);
|
||||
if (restart_timer)
|
||||
return HRTIMER_RESTART;
|
||||
else
|
||||
return HRTIMER_NORESTART;
|
||||
}
|
||||
|
Loading…
x
Reference in New Issue
Block a user