From dc93441b3f5879a096dd117a81df541b0855ebbb Mon Sep 17 00:00:00 2001 From: Pierre Ossman Date: Sun, 2 Dec 2007 19:45:19 +0100 Subject: [PATCH 1/5] sdhci: describe quirks Add a comment for each quirk to describe what it does and why. Signed-off-by: Pierre Ossman --- drivers/mmc/host/sdhci.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index ff59d2e0475b..17b4e391db35 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -26,12 +26,22 @@ static unsigned int debug_quirks = 0; +/* + * Different quirks to handle when the hardware deviates from a strict + * interpretation of the SDHCI specification. + */ + +/* Controller doesn't honor resets unless we touch the clock register */ #define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1<<0) +/* Controller has bad caps bits, but really supports DMA */ #define SDHCI_QUIRK_FORCE_DMA (1<<1) /* Controller doesn't like some resets when there is no card inserted. */ #define SDHCI_QUIRK_NO_CARD_NO_RESET (1<<2) +/* Controller doesn't like clearing the power reg before a change */ #define SDHCI_QUIRK_SINGLE_POWER_WRITE (1<<3) +/* Controller has flaky internal state so reset it on each ios change */ #define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS (1<<4) +/* Controller has an unusable DMA engine */ #define SDHCI_QUIRK_BROKEN_DMA (1<<5) static const struct pci_device_id pci_ids[] __devinitdata = { From c6573c94670882079174e2ea0da4abf1a0da51fe Mon Sep 17 00:00:00 2001 From: Pierre Ossman Date: Sun, 2 Dec 2007 19:46:49 +0100 Subject: [PATCH 2/5] sdhci: don't warn about sdhci 2.0 controllers We support 2.0 controllers, even though we don't use anything in the new feature set. Signed-off-by: Pierre Ossman --- drivers/mmc/host/sdhci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 17b4e391db35..758a7417eb50 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1294,7 +1294,7 @@ static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot) version = readw(host->ioaddr + SDHCI_HOST_VERSION); version = (version & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT; - if (version != 0) { + if (version > 1) { printk(KERN_ERR "%s: Unknown controller version (%d). " "You may experience problems.\n", host->slot_descr, version); From c9fddbc4f844f5a16b5957c61fe2cfcb5c12f990 Mon Sep 17 00:00:00 2001 From: Pierre Ossman Date: Sun, 2 Dec 2007 19:52:11 +0100 Subject: [PATCH 3/5] sdhci: use PIO when DMA can't satisfy the request Some controllers have been designed on the assumption that all transfers will be 32-bit aligned, both in start address and in size. This is not a guarantee the SDHCI specification provides and not one we can provide. Revert back to PIO for individual requests in order to work around the hardware bug. Signed-off-by: Pierre Ossman --- drivers/mmc/host/sdhci.c | 32 +++++++++++++++++++++++++++++--- drivers/mmc/host/sdhci.h | 3 ++- 2 files changed, 31 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 758a7417eb50..a5300f238d98 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -43,6 +43,10 @@ static unsigned int debug_quirks = 0; #define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS (1<<4) /* Controller has an unusable DMA engine */ #define SDHCI_QUIRK_BROKEN_DMA (1<<5) +/* Controller can only DMA from 32-bit aligned addresses */ +#define SDHCI_QUIRK_32BIT_DMA_ADDR (1<<6) +/* Controller can only DMA chunk sizes that are a multiple of 32 bits */ +#define SDHCI_QUIRK_32BIT_DMA_SIZE (1<<7) static const struct pci_device_id pci_ids[] __devinitdata = { { @@ -429,7 +433,29 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data) writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL); - if (host->flags & SDHCI_USE_DMA) { + if (host->flags & SDHCI_USE_DMA) + host->flags |= SDHCI_REQ_USE_DMA; + + if (unlikely((host->flags & SDHCI_REQ_USE_DMA) && + (host->chip->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE) && + ((data->blksz * data->blocks) & 0x3))) { + DBG("Reverting to PIO because of transfer size (%d)\n", + data->blksz * data->blocks); + host->flags &= ~SDHCI_REQ_USE_DMA; + } + + /* + * The assumption here being that alignment is the same after + * translation to device address space. + */ + if (unlikely((host->flags & SDHCI_REQ_USE_DMA) && + (host->chip->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) && + (data->sg->offset & 0x3))) { + DBG("Reverting to PIO because of bad alignment\n"); + host->flags &= ~SDHCI_REQ_USE_DMA; + } + + if (host->flags & SDHCI_REQ_USE_DMA) { int count; count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len, @@ -466,7 +492,7 @@ static void sdhci_set_transfer_mode(struct sdhci_host *host, mode |= SDHCI_TRNS_MULTI; if (data->flags & MMC_DATA_READ) mode |= SDHCI_TRNS_READ; - if (host->flags & SDHCI_USE_DMA) + if (host->flags & SDHCI_REQ_USE_DMA) mode |= SDHCI_TRNS_DMA; writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE); @@ -482,7 +508,7 @@ static void sdhci_finish_data(struct sdhci_host *host) data = host->data; host->data = NULL; - if (host->flags & SDHCI_USE_DMA) { + if (host->flags & SDHCI_REQ_USE_DMA) { pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len, (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE); } diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 05195ea900f4..e4d77b038bfa 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -171,7 +171,8 @@ struct sdhci_host { spinlock_t lock; /* Mutex */ int flags; /* Host attributes */ -#define SDHCI_USE_DMA (1<<0) +#define SDHCI_USE_DMA (1<<0) /* Host is DMA capable */ +#define SDHCI_REQ_USE_DMA (1<<1) /* Use DMA for this req. */ unsigned int max_clk; /* Max possible freq (MHz) */ unsigned int timeout_clk; /* Timeout freq (KHz) */ From 84c46a53fc4ea4ff36df783a20187b2f65dd21cc Mon Sep 17 00:00:00 2001 From: Pierre Ossman Date: Sun, 2 Dec 2007 19:58:16 +0100 Subject: [PATCH 4/5] sdhci: support JMicron JMB38x chips The JMicron JMB38x chip doesn't support transfers that aren't 32-bit aligned (both size and start address). It also doesn't like switching between PIO and DMA mode, so it needs to be reset after each request. Signed-off-by: Pierre Ossman --- drivers/mmc/host/sdhci.c | 19 ++++++++++++++++++- include/linux/pci_ids.h | 1 + 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index a5300f238d98..785bbdcf4a58 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -7,6 +7,10 @@ * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or (at * your option) any later version. + * + * Thanks to the following companies for their support: + * + * - JMicron (hardware and technical support) */ #include @@ -47,6 +51,8 @@ static unsigned int debug_quirks = 0; #define SDHCI_QUIRK_32BIT_DMA_ADDR (1<<6) /* Controller can only DMA chunk sizes that are a multiple of 32 bits */ #define SDHCI_QUIRK_32BIT_DMA_SIZE (1<<7) +/* Controller needs to be reset after each request to stay stable */ +#define SDHCI_QUIRK_RESET_AFTER_REQUEST (1<<8) static const struct pci_device_id pci_ids[] __devinitdata = { { @@ -111,6 +117,16 @@ static const struct pci_device_id pci_ids[] __devinitdata = { SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS, }, + { + .vendor = PCI_VENDOR_ID_JMICRON, + .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD, + .subvendor = PCI_ANY_ID, + .subdevice = PCI_ANY_ID, + .driver_data = SDHCI_QUIRK_32BIT_DMA_ADDR | + SDHCI_QUIRK_32BIT_DMA_SIZE | + SDHCI_QUIRK_RESET_AFTER_REQUEST, + }, + { /* Generic SD host controller */ PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00) }, @@ -922,7 +938,8 @@ static void sdhci_tasklet_finish(unsigned long param) */ if (mrq->cmd->error || (mrq->data && (mrq->data->error || - (mrq->data->stop && mrq->data->stop->error)))) { + (mrq->data->stop && mrq->data->stop->error))) || + (host->chip->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST)) { /* Some controllers need this kick or reset won't work here */ if (host->chip->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) { diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 111aa10f1136..023656d2f1da 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -2148,6 +2148,7 @@ #define PCI_DEVICE_ID_JMICRON_JMB365 0x2365 #define PCI_DEVICE_ID_JMICRON_JMB366 0x2366 #define PCI_DEVICE_ID_JMICRON_JMB368 0x2368 +#define PCI_DEVICE_ID_JMICRON_JMB38X_SD 0x2381 #define PCI_VENDOR_ID_KORENIX 0x1982 #define PCI_DEVICE_ID_KORENIX_JETCARDF0 0x1600 From cc3000e4ef13fa9f388f5a37f11c0fa3cc68112b Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Thu, 6 Dec 2007 23:12:46 -0500 Subject: [PATCH 5/5] mmc: remove unused 'mode' from the mmc_host structure This field and corresponding defines are simply never used anywhere in the code. But its mere presence is enough to confuse some host driver authors who attempt to rely on it. Let's eliminate the possibility for confusion and remove it entirely. Signed-off-by: Nicolas Pitre Signed-off-by: Pierre Ossman --- include/linux/mmc/host.h | 4 ---- 1 file changed, 4 deletions(-) diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index 125eee1407ff..7ab962fa1d73 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h @@ -118,10 +118,6 @@ struct mmc_host { unsigned int removed:1; /* host is being removed */ #endif - unsigned int mode; /* current card mode of host */ -#define MMC_MODE_MMC 0 -#define MMC_MODE_SD 1 - struct mmc_card *card; /* device attached to this host */ wait_queue_head_t wq;