mirror of
https://github.com/FEX-Emu/linux.git
synced 2024-12-19 07:27:50 +00:00
Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6: USB: unbind all interfaces before rebinding them USB: serial: digi_acceleport: Eliminate a NULL pointer dereference usb: fix ehci_hcd build failure when both generic-OF and xilinx is selected USB: cdc-acm: fix resource reclaim in error path of acm_probe USB: ftdi_sio: fix DTR/RTS line modes USB: s3c-hsotg: Ensure FIFOs are fully flushed after layout USB: s3c-hsotg: SoftDisconnect minimum 3ms USB: s3c-hsotg: Ensure TX FIFO addresses setup when initialising FIFOs USB: s3c_hsotg: define USB_GADGET_DUALSPEED in Kconfig USB: s3c: Enable soft disconnect during initialization USB: xhci: Print NEC firmware version. USB: xhci: Wait for host to start running. USB: xhci: Wait for controller to be ready after reset. USB: isp1362: fix inw warning on Blackfin systems USB: mos7840: fix null-pointer dereference
This commit is contained in:
commit
d7940b04fa
@ -1201,7 +1201,7 @@ made_compressed_probe:
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if (rcv->urb == NULL) {
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dev_dbg(&intf->dev,
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"out of memory (read urbs usb_alloc_urb)\n");
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goto alloc_fail7;
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goto alloc_fail6;
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}
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rcv->urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
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@ -1225,7 +1225,7 @@ made_compressed_probe:
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if (snd->urb == NULL) {
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dev_dbg(&intf->dev,
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"out of memory (write urbs usb_alloc_urb)");
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goto alloc_fail7;
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goto alloc_fail8;
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}
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if (usb_endpoint_xfer_int(epwrite))
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@ -1264,6 +1264,7 @@ made_compressed_probe:
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i = device_create_file(&intf->dev,
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&dev_attr_iCountryCodeRelDate);
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if (i < 0) {
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device_remove_file(&intf->dev, &dev_attr_wCountryCodes);
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kfree(acm->country_codes);
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goto skip_countries;
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}
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@ -1300,6 +1301,7 @@ alloc_fail8:
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usb_free_urb(acm->wb[i].urb);
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alloc_fail7:
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acm_read_buffers_free(acm);
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alloc_fail6:
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for (i = 0; i < num_rx_buf; i++)
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usb_free_urb(acm->ru[i].urb);
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usb_free_urb(acm->ctrlurb);
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|
@ -1328,6 +1328,7 @@ int usb_resume(struct device *dev, pm_message_t msg)
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/* For all other calls, take the device back to full power and
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* tell the PM core in case it was autosuspended previously.
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* Unbind the interfaces that will need rebinding later.
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*/
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} else {
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status = usb_resume_both(udev, msg);
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@ -1336,6 +1337,7 @@ int usb_resume(struct device *dev, pm_message_t msg)
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pm_runtime_set_active(dev);
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pm_runtime_enable(dev);
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udev->last_busy = jiffies;
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do_unbind_rebind(udev, DO_REBIND);
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}
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}
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|
@ -295,6 +295,7 @@ config USB_GADGET_S3C_HSOTG
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boolean "S3C HS/OtG USB Device controller"
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depends on S3C_DEV_USB_HSOTG
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select USB_GADGET_S3C_HSOTG_PIO
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select USB_GADGET_DUALSPEED
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help
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The Samsung S3C64XX USB2.0 high-speed gadget controller
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integrated into the S3C64XX series SoC.
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|
@ -297,6 +297,12 @@ static void s3c_hsotg_ctrl_epint(struct s3c_hsotg *hsotg,
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*/
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static void s3c_hsotg_init_fifo(struct s3c_hsotg *hsotg)
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{
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unsigned int ep;
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unsigned int addr;
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unsigned int size;
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int timeout;
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u32 val;
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/* the ryu 2.6.24 release ahs
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writel(0x1C0, hsotg->regs + S3C_GRXFSIZ);
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writel(S3C_GNPTXFSIZ_NPTxFStAddr(0x200) |
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@ -310,6 +316,51 @@ static void s3c_hsotg_init_fifo(struct s3c_hsotg *hsotg)
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writel(S3C_GNPTXFSIZ_NPTxFStAddr(2048) |
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S3C_GNPTXFSIZ_NPTxFDep(0x1C0),
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hsotg->regs + S3C_GNPTXFSIZ);
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/* arange all the rest of the TX FIFOs, as some versions of this
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* block have overlapping default addresses. This also ensures
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* that if the settings have been changed, then they are set to
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* known values. */
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/* start at the end of the GNPTXFSIZ, rounded up */
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addr = 2048 + 1024;
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size = 768;
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/* currently we allocate TX FIFOs for all possible endpoints,
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* and assume that they are all the same size. */
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for (ep = 0; ep <= 15; ep++) {
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val = addr;
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val |= size << S3C_DPTXFSIZn_DPTxFSize_SHIFT;
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addr += size;
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writel(val, hsotg->regs + S3C_DPTXFSIZn(ep));
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}
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/* according to p428 of the design guide, we need to ensure that
|
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* all fifos are flushed before continuing */
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|
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writel(S3C_GRSTCTL_TxFNum(0x10) | S3C_GRSTCTL_TxFFlsh |
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S3C_GRSTCTL_RxFFlsh, hsotg->regs + S3C_GRSTCTL);
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/* wait until the fifos are both flushed */
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timeout = 100;
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while (1) {
|
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val = readl(hsotg->regs + S3C_GRSTCTL);
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if ((val & (S3C_GRSTCTL_TxFFlsh | S3C_GRSTCTL_RxFFlsh)) == 0)
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||||
break;
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||||
|
||||
if (--timeout == 0) {
|
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dev_err(hsotg->dev,
|
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"%s: timeout flushing fifos (GRSTCTL=%08x)\n",
|
||||
__func__, val);
|
||||
}
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udelay(1);
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}
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dev_dbg(hsotg->dev, "FIFOs reset, timeout at %d\n", timeout);
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}
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/**
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@ -2574,6 +2625,9 @@ int usb_gadget_register_driver(struct usb_gadget_driver *driver)
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writel(S3C_DCTL_CGOUTNak | S3C_DCTL_CGNPInNAK,
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hsotg->regs + S3C_DCTL);
|
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|
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/* must be at-least 3ms to allow bus to see disconnect */
|
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msleep(3);
|
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|
||||
/* remove the soft-disconnect and let's go */
|
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__bic32(hsotg->regs + S3C_DCTL, S3C_DCTL_SftDiscon);
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|
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@ -2730,6 +2784,9 @@ static void s3c_hsotg_init(struct s3c_hsotg *hsotg)
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writel(0, hsotg->regs + S3C_DAINTMSK);
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/* Be in disconnected state until gadget is registered */
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__orr32(hsotg->regs + S3C_DCTL, S3C_DCTL_SftDiscon);
|
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if (0) {
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/* post global nak until we're ready */
|
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writel(S3C_DCTL_SGNPInNAK | S3C_DCTL_SGOUTNak,
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|
@ -1135,7 +1135,7 @@ MODULE_LICENSE ("GPL");
|
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|
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#ifdef CONFIG_XPS_USB_HCD_XILINX
|
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#include "ehci-xilinx-of.c"
|
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#define OF_PLATFORM_DRIVER ehci_hcd_xilinx_of_driver
|
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#define XILINX_OF_PLATFORM_DRIVER ehci_hcd_xilinx_of_driver
|
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#endif
|
||||
|
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#ifdef CONFIG_PLAT_ORION
|
||||
@ -1159,7 +1159,8 @@ MODULE_LICENSE ("GPL");
|
||||
#endif
|
||||
|
||||
#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
|
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!defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER)
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!defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
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!defined(XILINX_OF_PLATFORM_DRIVER)
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#error "missing bus glue for ehci-hcd"
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#endif
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@ -1213,10 +1214,20 @@ static int __init ehci_hcd_init(void)
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if (retval < 0)
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goto clean3;
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#endif
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|
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#ifdef XILINX_OF_PLATFORM_DRIVER
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retval = of_register_platform_driver(&XILINX_OF_PLATFORM_DRIVER);
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if (retval < 0)
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goto clean4;
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#endif
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return retval;
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#ifdef XILINX_OF_PLATFORM_DRIVER
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/* of_unregister_platform_driver(&XILINX_OF_PLATFORM_DRIVER); */
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clean4:
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#endif
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#ifdef OF_PLATFORM_DRIVER
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/* of_unregister_platform_driver(&OF_PLATFORM_DRIVER); */
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of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
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clean3:
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#endif
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#ifdef PS3_SYSTEM_BUS_DRIVER
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@ -1243,6 +1254,9 @@ module_init(ehci_hcd_init);
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static void __exit ehci_hcd_cleanup(void)
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{
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#ifdef XILINX_OF_PLATFORM_DRIVER
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of_unregister_platform_driver(&XILINX_OF_PLATFORM_DRIVER);
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#endif
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#ifdef OF_PLATFORM_DRIVER
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of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
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#endif
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|
@ -65,7 +65,7 @@ static inline void delayed_insw(unsigned int addr, void *buf, int len)
|
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unsigned short *bp = (unsigned short *)buf;
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while (len--) {
|
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DUMMY_DELAY_ACCESS;
|
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*bp++ = inw((void *)addr);
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*bp++ = inw(addr);
|
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}
|
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}
|
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|
||||
|
@ -78,6 +78,8 @@ static int xhci_pci_setup(struct usb_hcd *hcd)
|
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xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
|
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" endpoint cmd after reset endpoint\n");
|
||||
}
|
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if (pdev->vendor == PCI_VENDOR_ID_NEC)
|
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xhci->quirks |= XHCI_NEC_HOST;
|
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|
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/* Make sure the HC is halted. */
|
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retval = xhci_halt(xhci);
|
||||
|
@ -1071,6 +1071,15 @@ bandwidth_change:
|
||||
xhci_warn(xhci, "Reset device command completion "
|
||||
"for disabled slot %u\n", slot_id);
|
||||
break;
|
||||
case TRB_TYPE(TRB_NEC_GET_FW):
|
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if (!(xhci->quirks & XHCI_NEC_HOST)) {
|
||||
xhci->error_bitmask |= 1 << 6;
|
||||
break;
|
||||
}
|
||||
xhci_dbg(xhci, "NEC firmware version %2x.%02x\n",
|
||||
NEC_FW_MAJOR(event->status),
|
||||
NEC_FW_MINOR(event->status));
|
||||
break;
|
||||
default:
|
||||
/* Skip over unknown commands on the event ring */
|
||||
xhci->error_bitmask |= 1 << 6;
|
||||
@ -1079,6 +1088,17 @@ bandwidth_change:
|
||||
inc_deq(xhci, xhci->cmd_ring, false);
|
||||
}
|
||||
|
||||
static void handle_vendor_event(struct xhci_hcd *xhci,
|
||||
union xhci_trb *event)
|
||||
{
|
||||
u32 trb_type;
|
||||
|
||||
trb_type = TRB_FIELD_TO_TYPE(event->generic.field[3]);
|
||||
xhci_dbg(xhci, "Vendor specific event TRB type = %u\n", trb_type);
|
||||
if (trb_type == TRB_NEC_CMD_COMP && (xhci->quirks & XHCI_NEC_HOST))
|
||||
handle_cmd_completion(xhci, &event->event_cmd);
|
||||
}
|
||||
|
||||
static void handle_port_status(struct xhci_hcd *xhci,
|
||||
union xhci_trb *event)
|
||||
{
|
||||
@ -1659,7 +1679,10 @@ void xhci_handle_event(struct xhci_hcd *xhci)
|
||||
update_ptrs = 0;
|
||||
break;
|
||||
default:
|
||||
xhci->error_bitmask |= 1 << 3;
|
||||
if ((event->event_cmd.flags & TRB_TYPE_BITMASK) >= TRB_TYPE(48))
|
||||
handle_vendor_event(xhci, event);
|
||||
else
|
||||
xhci->error_bitmask |= 1 << 3;
|
||||
}
|
||||
/* Any of the above functions may drop and re-acquire the lock, so check
|
||||
* to make sure a watchdog timer didn't mark the host as non-responsive.
|
||||
@ -2378,6 +2401,12 @@ int xhci_queue_address_device(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr,
|
||||
false);
|
||||
}
|
||||
|
||||
int xhci_queue_vendor_command(struct xhci_hcd *xhci,
|
||||
u32 field1, u32 field2, u32 field3, u32 field4)
|
||||
{
|
||||
return queue_command(xhci, field1, field2, field3, field4, false);
|
||||
}
|
||||
|
||||
/* Queue a reset device command TRB */
|
||||
int xhci_queue_reset_device(struct xhci_hcd *xhci, u32 slot_id)
|
||||
{
|
||||
|
@ -105,6 +105,33 @@ int xhci_halt(struct xhci_hcd *xhci)
|
||||
STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
|
||||
}
|
||||
|
||||
/*
|
||||
* Set the run bit and wait for the host to be running.
|
||||
*/
|
||||
int xhci_start(struct xhci_hcd *xhci)
|
||||
{
|
||||
u32 temp;
|
||||
int ret;
|
||||
|
||||
temp = xhci_readl(xhci, &xhci->op_regs->command);
|
||||
temp |= (CMD_RUN);
|
||||
xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
|
||||
temp);
|
||||
xhci_writel(xhci, temp, &xhci->op_regs->command);
|
||||
|
||||
/*
|
||||
* Wait for the HCHalted Status bit to be 0 to indicate the host is
|
||||
* running.
|
||||
*/
|
||||
ret = handshake(xhci, &xhci->op_regs->status,
|
||||
STS_HALT, 0, XHCI_MAX_HALT_USEC);
|
||||
if (ret == -ETIMEDOUT)
|
||||
xhci_err(xhci, "Host took too long to start, "
|
||||
"waited %u microseconds.\n",
|
||||
XHCI_MAX_HALT_USEC);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* Reset a halted HC, and set the internal HC state to HC_STATE_HALT.
|
||||
*
|
||||
@ -116,6 +143,7 @@ int xhci_reset(struct xhci_hcd *xhci)
|
||||
{
|
||||
u32 command;
|
||||
u32 state;
|
||||
int ret;
|
||||
|
||||
state = xhci_readl(xhci, &xhci->op_regs->status);
|
||||
if ((state & STS_HALT) == 0) {
|
||||
@ -130,7 +158,17 @@ int xhci_reset(struct xhci_hcd *xhci)
|
||||
/* XXX: Why does EHCI set this here? Shouldn't other code do this? */
|
||||
xhci_to_hcd(xhci)->state = HC_STATE_HALT;
|
||||
|
||||
return handshake(xhci, &xhci->op_regs->command, CMD_RESET, 0, 250 * 1000);
|
||||
ret = handshake(xhci, &xhci->op_regs->command,
|
||||
CMD_RESET, 0, 250 * 1000);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
|
||||
/*
|
||||
* xHCI cannot write to any doorbells or operational registers other
|
||||
* than status until the "Controller Not Ready" flag is cleared.
|
||||
*/
|
||||
return handshake(xhci, &xhci->op_regs->status, STS_CNR, 0, 250 * 1000);
|
||||
}
|
||||
|
||||
|
||||
@ -448,17 +486,20 @@ int xhci_run(struct usb_hcd *hcd)
|
||||
|
||||
if (NUM_TEST_NOOPS > 0)
|
||||
doorbell = xhci_setup_one_noop(xhci);
|
||||
if (xhci->quirks & XHCI_NEC_HOST)
|
||||
xhci_queue_vendor_command(xhci, 0, 0, 0,
|
||||
TRB_TYPE(TRB_NEC_GET_FW));
|
||||
|
||||
if (xhci_start(xhci)) {
|
||||
xhci_halt(xhci);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
temp = xhci_readl(xhci, &xhci->op_regs->command);
|
||||
temp |= (CMD_RUN);
|
||||
xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
|
||||
temp);
|
||||
xhci_writel(xhci, temp, &xhci->op_regs->command);
|
||||
/* Flush PCI posted writes */
|
||||
temp = xhci_readl(xhci, &xhci->op_regs->command);
|
||||
xhci_dbg(xhci, "// @%p = 0x%x\n", &xhci->op_regs->command, temp);
|
||||
if (doorbell)
|
||||
(*doorbell)(xhci);
|
||||
if (xhci->quirks & XHCI_NEC_HOST)
|
||||
xhci_ring_cmd_db(xhci);
|
||||
|
||||
xhci_dbg(xhci, "Finished xhci_run\n");
|
||||
return 0;
|
||||
|
@ -925,6 +925,7 @@ union xhci_trb {
|
||||
/* TRB bit mask */
|
||||
#define TRB_TYPE_BITMASK (0xfc00)
|
||||
#define TRB_TYPE(p) ((p) << 10)
|
||||
#define TRB_FIELD_TO_TYPE(p) (((p) & TRB_TYPE_BITMASK) >> 10)
|
||||
/* TRB type IDs */
|
||||
/* bulk, interrupt, isoc scatter/gather, and control data stage */
|
||||
#define TRB_NORMAL 1
|
||||
@ -992,6 +993,14 @@ union xhci_trb {
|
||||
#define TRB_MFINDEX_WRAP 39
|
||||
/* TRB IDs 40-47 reserved, 48-63 is vendor-defined */
|
||||
|
||||
/* Nec vendor-specific command completion event. */
|
||||
#define TRB_NEC_CMD_COMP 48
|
||||
/* Get NEC firmware revision. */
|
||||
#define TRB_NEC_GET_FW 49
|
||||
|
||||
#define NEC_FW_MINOR(p) (((p) >> 0) & 0xff)
|
||||
#define NEC_FW_MAJOR(p) (((p) >> 8) & 0xff)
|
||||
|
||||
/*
|
||||
* TRBS_PER_SEGMENT must be a multiple of 4,
|
||||
* since the command ring is 64-byte aligned.
|
||||
@ -1172,6 +1181,7 @@ struct xhci_hcd {
|
||||
unsigned int quirks;
|
||||
#define XHCI_LINK_TRB_QUIRK (1 << 0)
|
||||
#define XHCI_RESET_EP_QUIRK (1 << 1)
|
||||
#define XHCI_NEC_HOST (1 << 2)
|
||||
};
|
||||
|
||||
/* For testing purposes */
|
||||
@ -1379,6 +1389,8 @@ void xhci_set_hc_event_deq(struct xhci_hcd *xhci);
|
||||
int xhci_queue_slot_control(struct xhci_hcd *xhci, u32 trb_type, u32 slot_id);
|
||||
int xhci_queue_address_device(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr,
|
||||
u32 slot_id);
|
||||
int xhci_queue_vendor_command(struct xhci_hcd *xhci,
|
||||
u32 field1, u32 field2, u32 field3, u32 field4);
|
||||
int xhci_queue_stop_endpoint(struct xhci_hcd *xhci, int slot_id,
|
||||
unsigned int ep_index);
|
||||
int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags, struct urb *urb,
|
||||
|
@ -1239,8 +1239,7 @@ static void digi_write_bulk_callback(struct urb *urb)
|
||||
|
||||
/* port and serial sanity check */
|
||||
if (port == NULL || (priv = usb_get_serial_port_data(port)) == NULL) {
|
||||
dev_err(&port->dev,
|
||||
"%s: port or port->private is NULL, status=%d\n",
|
||||
pr_err("%s: port or port->private is NULL, status=%d\n",
|
||||
__func__, status);
|
||||
return;
|
||||
}
|
||||
|
@ -2005,6 +2005,8 @@ static void ftdi_set_termios(struct tty_struct *tty,
|
||||
"urb failed to set to rts/cts flow control\n");
|
||||
}
|
||||
|
||||
/* raise DTR/RTS */
|
||||
set_mctrl(port, TIOCM_DTR | TIOCM_RTS);
|
||||
} else {
|
||||
/*
|
||||
* Xon/Xoff code
|
||||
@ -2052,6 +2054,8 @@ static void ftdi_set_termios(struct tty_struct *tty,
|
||||
}
|
||||
}
|
||||
|
||||
/* lower DTR/RTS */
|
||||
clear_mctrl(port, TIOCM_DTR | TIOCM_RTS);
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
@ -730,7 +730,6 @@ static void mos7840_bulk_in_callback(struct urb *urb)
|
||||
mos7840_port = urb->context;
|
||||
if (!mos7840_port) {
|
||||
dbg("%s", "NULL mos7840_port pointer");
|
||||
mos7840_port->read_urb_busy = false;
|
||||
return;
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user