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KVM/ARM fixes:

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- Fix for an unpleasant crash when the VM is created without a timer
 - Allow HYP mode to access the full PA space, and not only 40bit
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Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Pull ARM KVM fixes from Paolo Bonzini:
 - Fix for an unpleasant crash when the VM is created without a timer
 - Allow HYP mode to access the full PA space, and not only 40bit

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
  arm64: KVM: Configure TCR_EL2.PS at runtime
  KVM: arm/arm64: Fix reference to uninitialised VGIC
This commit is contained in:
Linus Torvalds 2016-02-16 10:50:46 -08:00
commit d82834ee13
3 changed files with 14 additions and 11 deletions
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2
arch/arm64/include/asm/kvm_arm.h
View File

@ -107,8 +107,6 @@
#define TCR_EL2_MASK (TCR_EL2_TG0 | TCR_EL2_SH0 | \ #define TCR_EL2_MASK (TCR_EL2_TG0 | TCR_EL2_SH0 | \
TCR_EL2_ORGN0 | TCR_EL2_IRGN0 | TCR_EL2_T0SZ) TCR_EL2_ORGN0 | TCR_EL2_IRGN0 | TCR_EL2_T0SZ)
#define TCR_EL2_FLAGS (TCR_EL2_RES1 | TCR_EL2_PS_40B)
/* VTCR_EL2 Registers bits */ /* VTCR_EL2 Registers bits */
#define VTCR_EL2_RES1 (1 << 31) #define VTCR_EL2_RES1 (1 << 31)
#define VTCR_EL2_PS_MASK (7 << 16) #define VTCR_EL2_PS_MASK (7 << 16)

14
arch/arm64/kvm/hyp-init.S
View File

@ -64,7 +64,7 @@ __do_hyp_init:
mrs x4, tcr_el1 mrs x4, tcr_el1
ldr x5, =TCR_EL2_MASK ldr x5, =TCR_EL2_MASK
and x4, x4, x5 and x4, x4, x5
ldr x5, =TCR_EL2_FLAGS mov x5, #TCR_EL2_RES1
orr x4, x4, x5 orr x4, x4, x5
#ifndef CONFIG_ARM64_VA_BITS_48 #ifndef CONFIG_ARM64_VA_BITS_48
@ -85,14 +85,16 @@ __do_hyp_init:
ldr_l x5, idmap_t0sz ldr_l x5, idmap_t0sz
bfi x4, x5, TCR_T0SZ_OFFSET, TCR_TxSZ_WIDTH bfi x4, x5, TCR_T0SZ_OFFSET, TCR_TxSZ_WIDTH
#endif #endif
/*
* Read the PARange bits from ID_AA64MMFR0_EL1 and set the PS bits in
* TCR_EL2 and VTCR_EL2.
*/
mrs x5, ID_AA64MMFR0_EL1
bfi x4, x5, #16, #3
msr tcr_el2, x4 msr tcr_el2, x4
ldr x4, =VTCR_EL2_FLAGS ldr x4, =VTCR_EL2_FLAGS
/*
* Read the PARange bits from ID_AA64MMFR0_EL1 and set the PS bits in
* VTCR_EL2.
*/
mrs x5, ID_AA64MMFR0_EL1
bfi x4, x5, #16, #3 bfi x4, x5, #16, #3
/* /*
* Read the VMIDBits bits from ID_AA64MMFR1_EL1 and set the VS bit in * Read the VMIDBits bits from ID_AA64MMFR1_EL1 and set the VS bit in

9
virt/kvm/arm/arch_timer.c
View File

@ -143,7 +143,7 @@ static void kvm_timer_update_irq(struct kvm_vcpu *vcpu, bool new_level)
* Check if there was a change in the timer state (should we raise or lower * Check if there was a change in the timer state (should we raise or lower
* the line level to the GIC). * the line level to the GIC).
*/ */
static void kvm_timer_update_state(struct kvm_vcpu *vcpu) static int kvm_timer_update_state(struct kvm_vcpu *vcpu)
{ {
struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
@ -154,10 +154,12 @@ static void kvm_timer_update_state(struct kvm_vcpu *vcpu)
* until we call this function from kvm_timer_flush_hwstate. * until we call this function from kvm_timer_flush_hwstate.
*/ */
if (!vgic_initialized(vcpu->kvm)) if (!vgic_initialized(vcpu->kvm))
return; return -ENODEV;
if (kvm_timer_should_fire(vcpu) != timer->irq.level) if (kvm_timer_should_fire(vcpu) != timer->irq.level)
kvm_timer_update_irq(vcpu, !timer->irq.level); kvm_timer_update_irq(vcpu, !timer->irq.level);
return 0;
} }
/* /*
@ -218,7 +220,8 @@ void kvm_timer_flush_hwstate(struct kvm_vcpu *vcpu)
bool phys_active; bool phys_active;
int ret; int ret;
kvm_timer_update_state(vcpu); if (kvm_timer_update_state(vcpu))
return;
/* /*
* If we enter the guest with the virtual input level to the VGIC * If we enter the guest with the virtual input level to the VGIC