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hexagon: drop _PAGE_FILE and pte_file()-related helpers
We've replaced remap_file_pages(2) implementation with emulation. Nobody creates non-linear mapping anymore. This patch also increase number of bits availble for swap offset. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Cc: Richard Kuo <rkuo@codeaurora.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -61,13 +61,6 @@ extern unsigned long zero_page_mask;
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#define _PAGE_DIRTY (1<<1)
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#define _PAGE_ACCESSED (1<<2)
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/*
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* _PAGE_FILE is only meaningful if _PAGE_PRESENT is false, while
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* _PAGE_DIRTY is only meaningful if _PAGE_PRESENT is true.
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* So we can overload the bit...
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*/
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#define _PAGE_FILE _PAGE_DIRTY /* set: pagecache, unset = swap */
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/*
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* For now, let's say that Valid and Present are the same thing.
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* Alternatively, we could say that it's the "or" of R, W, and X
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@ -456,57 +449,36 @@ static inline int pte_exec(pte_t pte)
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#define pgtable_cache_init() do { } while (0)
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/*
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* Swap/file PTE definitions. If _PAGE_PRESENT is zero, the rest of the
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* PTE is interpreted as swap information. Depending on the _PAGE_FILE
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* bit, the remaining free bits are eitehr interpreted as a file offset
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* or a swap type/offset tuple. Rather than have the TLB fill handler
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* test _PAGE_PRESENT, we're going to reserve the permissions bits
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* and set them to all zeros for swap entries, which speeds up the
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* miss handler at the cost of 3 bits of offset. That trade-off can
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* be revisited if necessary, but Hexagon processor architecture and
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* target applications suggest a lot of TLB misses and not much swap space.
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* Swap/file PTE definitions. If _PAGE_PRESENT is zero, the rest of the PTE is
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* interpreted as swap information. The remaining free bits are interpreted as
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* swap type/offset tuple. Rather than have the TLB fill handler test
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* _PAGE_PRESENT, we're going to reserve the permissions bits and set them to
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* all zeros for swap entries, which speeds up the miss handler at the cost of
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* 3 bits of offset. That trade-off can be revisited if necessary, but Hexagon
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* processor architecture and target applications suggest a lot of TLB misses
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* and not much swap space.
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*
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* Format of swap PTE:
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* bit 0: Present (zero)
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* bit 1: _PAGE_FILE (zero)
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* bits 2-6: swap type (arch independent layer uses 5 bits max)
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* bits 7-9: bits 2:0 of offset
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* bits 10-12: effectively _PAGE_PROTNONE (all zero)
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* bits 13-31: bits 21:3 of swap offset
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*
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* Format of file PTE:
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* bit 0: Present (zero)
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* bit 1: _PAGE_FILE (zero)
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* bits 2-9: bits 7:0 of offset
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* bits 10-12: effectively _PAGE_PROTNONE (all zero)
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* bits 13-31: bits 26:8 of swap offset
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* bits 1-5: swap type (arch independent layer uses 5 bits max)
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* bits 6-9: bits 3:0 of offset
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* bits 10-12: effectively _PAGE_PROTNONE (all zero)
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* bits 13-31: bits 22:4 of swap offset
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*
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* The split offset makes some of the following macros a little gnarly,
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* but there's plenty of precedent for this sort of thing.
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*/
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#define PTE_FILE_MAX_BITS 27
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/* Used for swap PTEs */
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#define __swp_type(swp_pte) (((swp_pte).val >> 2) & 0x1f)
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#define __swp_type(swp_pte) (((swp_pte).val >> 1) & 0x1f)
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#define __swp_offset(swp_pte) \
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((((swp_pte).val >> 7) & 0x7) | (((swp_pte).val >> 10) & 0x003ffff8))
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((((swp_pte).val >> 6) & 0xf) | (((swp_pte).val >> 9) & 0x7ffff0))
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#define __swp_entry(type, offset) \
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((swp_entry_t) { \
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((type << 2) | \
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((offset & 0x3ffff8) << 10) | ((offset & 0x7) << 7)) })
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/* Used for file PTEs */
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#define pte_file(pte) \
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((pte_val(pte) & (_PAGE_FILE | _PAGE_PRESENT)) == _PAGE_FILE)
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#define pte_to_pgoff(pte) \
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(((pte_val(pte) >> 2) & 0xff) | ((pte_val(pte) >> 5) & 0x07ffff00))
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#define pgoff_to_pte(off) \
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((pte_t) { ((((off) & 0x7ffff00) << 5) | (((off) & 0xff) << 2)\
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| _PAGE_FILE) })
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((type << 1) | \
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((offset & 0x7ffff0) << 9) | ((offset & 0xf) << 6)) })
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/* Oh boy. There are a lot of possible arch overrides found in this file. */
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#include <asm-generic/pgtable.h>
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