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[PATCH] forcedeth: Improve ethtool support
This is a multi-part message in MIME format. Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
This commit is contained in:
Manfred Spraul
Jeff Garzik
parent
d81c0983de
commit
dc8216c192
@ -85,7 +85,8 @@
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* 0.33: 16 May 2005: Support for MCP51 added.
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* 0.34: 18 Jun 2005: Add DEV_NEED_LINKTIMER to all nForce nics.
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* 0.35: 26 Jun 2005: Support for MCP55 added.
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* 0.36: 28 Jul 2005: Add jumbo frame support.
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* 0.36: 28 Jun 2005: Add jumbo frame support.
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* 0.37: 10 Jul 2005: Additional ethtool support, cleanup of pci id list
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*
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* Known bugs:
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* We suspect that on some hardware no TX done interrupts are generated.
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@ -97,7 +98,7 @@
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* DEV_NEED_TIMERIRQ will not harm you on sane hardware, only generating a few
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* superfluous timer interrupts from the nic.
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*/
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#define FORCEDETH_VERSION "0.36"
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#define FORCEDETH_VERSION "0.37"
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#define DRV_NAME "forcedeth"
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#include <linux/module.h>
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@ -137,6 +138,7 @@
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#define DEV_IRQMASK_2 0x0004 /* use NVREG_IRQMASK_WANTED_2 for irq mask */
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#define DEV_NEED_TIMERIRQ 0x0008 /* set the timer irq flag in the irq mask */
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#define DEV_NEED_LINKTIMER 0x0010 /* poll link settings. Relies on the timer irq */
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#define DEV_HAS_LARGEDESC 0x0020 /* device supports jumbo frames and needs packet format 2 */
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enum {
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NvRegIrqStatus = 0x000,
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@ -1846,6 +1848,50 @@ static int nv_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
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return 0;
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}
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#define FORCEDETH_REGS_VER 1
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#define FORCEDETH_REGS_SIZE 0x400 /* 256 32-bit registers */
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static int nv_get_regs_len(struct net_device *dev)
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{
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return FORCEDETH_REGS_SIZE;
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}
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static void nv_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *buf)
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{
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struct fe_priv *np = get_nvpriv(dev);
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u8 __iomem *base = get_hwbase(dev);
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u32 *rbuf = buf;
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int i;
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regs->version = FORCEDETH_REGS_VER;
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spin_lock_irq(&np->lock);
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for (i=0;i<FORCEDETH_REGS_SIZE/sizeof(u32);i++)
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rbuf[i] = readl(base + i*sizeof(u32));
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spin_unlock_irq(&np->lock);
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}
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static int nv_nway_reset(struct net_device *dev)
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{
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struct fe_priv *np = get_nvpriv(dev);
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int ret;
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spin_lock_irq(&np->lock);
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if (np->autoneg) {
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int bmcr;
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bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
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bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
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mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);
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ret = 0;
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} else {
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ret = -EINVAL;
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}
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spin_unlock_irq(&np->lock);
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return ret;
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}
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static struct ethtool_ops ops = {
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.get_drvinfo = nv_get_drvinfo,
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.get_link = ethtool_op_get_link,
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@ -1853,6 +1899,9 @@ static struct ethtool_ops ops = {
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.set_wol = nv_set_wol,
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.get_settings = nv_get_settings,
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.set_settings = nv_set_settings,
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.get_regs_len = nv_get_regs_len,
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.get_regs = nv_get_regs,
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.nway_reset = nv_nway_reset,
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};
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static int nv_open(struct net_device *dev)
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@ -2092,18 +2141,13 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
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}
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/* handle different descriptor versions */
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if (pci_dev->device == PCI_DEVICE_ID_NVIDIA_NVENET_1 ||
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pci_dev->device == PCI_DEVICE_ID_NVIDIA_NVENET_2 ||
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pci_dev->device == PCI_DEVICE_ID_NVIDIA_NVENET_3 ||
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pci_dev->device == PCI_DEVICE_ID_NVIDIA_NVENET_12 ||
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pci_dev->device == PCI_DEVICE_ID_NVIDIA_NVENET_13) {
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np->desc_ver = DESC_VER_1;
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np->pkt_limit = NV_PKTLIMIT_1;
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} else {
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np->desc_ver = DESC_VER_1;
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np->pkt_limit = NV_PKTLIMIT_1;
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if (id->driver_data & DEV_HAS_LARGEDESC) {
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np->desc_ver = DESC_VER_2;
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np->pkt_limit = NV_PKTLIMIT_2;
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}
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err = -ENOMEM;
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np->base = ioremap(addr, NV_PCI_REGSZ);
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if (!np->base)
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@ -2284,109 +2328,74 @@ static void __devexit nv_remove(struct pci_dev *pci_dev)
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static struct pci_device_id pci_tbl[] = {
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{ /* nForce Ethernet Controller */
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.vendor = PCI_VENDOR_ID_NVIDIA,
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.device = PCI_DEVICE_ID_NVIDIA_NVENET_1,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_1),
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.driver_data = DEV_IRQMASK_1|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
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},
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{ /* nForce2 Ethernet Controller */
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.vendor = PCI_VENDOR_ID_NVIDIA,
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.device = PCI_DEVICE_ID_NVIDIA_NVENET_2,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_2),
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
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},
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{ /* nForce3 Ethernet Controller */
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.vendor = PCI_VENDOR_ID_NVIDIA,
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.device = PCI_DEVICE_ID_NVIDIA_NVENET_3,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_3),
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
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},
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{ /* nForce3 Ethernet Controller */
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.vendor = PCI_VENDOR_ID_NVIDIA,
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.device = PCI_DEVICE_ID_NVIDIA_NVENET_4,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
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PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_4),
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|
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DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC,
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},
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{ /* nForce3 Ethernet Controller */
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.vendor = PCI_VENDOR_ID_NVIDIA,
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.device = PCI_DEVICE_ID_NVIDIA_NVENET_5,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
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PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_5),
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|
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DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC,
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},
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{ /* nForce3 Ethernet Controller */
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.vendor = PCI_VENDOR_ID_NVIDIA,
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.device = PCI_DEVICE_ID_NVIDIA_NVENET_6,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
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PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_6),
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|
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DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC,
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},
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{ /* nForce3 Ethernet Controller */
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.vendor = PCI_VENDOR_ID_NVIDIA,
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.device = PCI_DEVICE_ID_NVIDIA_NVENET_7,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
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PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_7),
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|
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DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC,
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},
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{ /* CK804 Ethernet Controller */
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.vendor = PCI_VENDOR_ID_NVIDIA,
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.device = PCI_DEVICE_ID_NVIDIA_NVENET_8,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
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PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_8),
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|
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DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC,
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},
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{ /* CK804 Ethernet Controller */
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.vendor = PCI_VENDOR_ID_NVIDIA,
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.device = PCI_DEVICE_ID_NVIDIA_NVENET_9,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
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PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_9),
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|
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DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC,
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},
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{ /* MCP04 Ethernet Controller */
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.vendor = PCI_VENDOR_ID_NVIDIA,
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.device = PCI_DEVICE_ID_NVIDIA_NVENET_10,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
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PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_10),
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|
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DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC,
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},
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{ /* MCP04 Ethernet Controller */
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.vendor = PCI_VENDOR_ID_NVIDIA,
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.device = PCI_DEVICE_ID_NVIDIA_NVENET_11,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_11),
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|
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DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC,
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},
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{ /* MCP51 Ethernet Controller */
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PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_12),
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
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},
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{ /* MCP51 Ethernet Controller */
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.vendor = PCI_VENDOR_ID_NVIDIA,
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.device = PCI_DEVICE_ID_NVIDIA_NVENET_12,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
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},
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{ /* MCP51 Ethernet Controller */
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.vendor = PCI_VENDOR_ID_NVIDIA,
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.device = PCI_DEVICE_ID_NVIDIA_NVENET_13,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_13),
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
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},
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{ /* MCP55 Ethernet Controller */
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.vendor = PCI_VENDOR_ID_NVIDIA,
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.device = PCI_DEVICE_ID_NVIDIA_NVENET_14,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
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PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_14),
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|
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DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC,
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},
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{ /* MCP55 Ethernet Controller */
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.vendor = PCI_VENDOR_ID_NVIDIA,
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.device = PCI_DEVICE_ID_NVIDIA_NVENET_15,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
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PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_15),
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.driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|
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DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC,
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},
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{0,},
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};
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