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https://github.com/FEX-Emu/linux.git
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mwifiex: add firmware dump feature for PCIe
Firmware dump feature is added for PCIe based chipsets. Separate file will be created at /var/log/fw_dump_* for each memory segment. Signed-off-by: Amitkumar Karwar <akarwar@marvell.com> Signed-off-by: Bing Zhao <bzhao@marvell.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Amitkumar Karwar
John W. Linville
parent
1c09bf682c
commit
e050c76fcf
@ -960,6 +960,9 @@ mwifiex_cmd_timeout_func(unsigned long function_context)
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if (adapter->hw_status == MWIFIEX_HW_STATUS_INITIALIZING)
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mwifiex_init_fw_complete(adapter);
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if (adapter->if_ops.fw_dump)
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adapter->if_ops.fw_dump(adapter);
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if (adapter->if_ops.card_reset)
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adapter->if_ops.card_reset(adapter);
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}
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@ -881,6 +881,8 @@ mwifiex_add_card(void *card, struct semaphore *sem,
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goto err_kmalloc;
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INIT_WORK(&adapter->main_work, mwifiex_main_work_queue);
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if (adapter->if_ops.iface_work)
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INIT_WORK(&adapter->iface_work, adapter->if_ops.iface_work);
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/* Register the device. Fill up the private data structure with relevant
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information from the card. */
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@ -674,6 +674,7 @@ struct mwifiex_if_ops {
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void (*card_reset) (struct mwifiex_adapter *);
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void (*fw_dump)(struct mwifiex_adapter *);
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int (*clean_pcie_ring) (struct mwifiex_adapter *adapter);
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void (*iface_work)(struct work_struct *work);
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};
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struct mwifiex_adapter {
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@ -809,6 +810,7 @@ struct mwifiex_adapter {
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bool ext_scan;
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u8 fw_api_ver;
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u8 fw_key_api_major_ver, fw_key_api_minor_ver;
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struct work_struct iface_work;
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};
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int mwifiex_init_lock_list(struct mwifiex_adapter *adapter);
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@ -37,6 +37,9 @@ static struct mwifiex_if_ops pcie_ops;
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static struct semaphore add_remove_card_sem;
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/* enum mwifiex_pcie_work_flags bitmap */
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static unsigned long pcie_work_flags;
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static int
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mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb,
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size_t size, int flags)
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@ -221,6 +224,8 @@ static void mwifiex_pcie_remove(struct pci_dev *pdev)
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if (!adapter || !adapter->priv_num)
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return;
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cancel_work_sync(&adapter->iface_work);
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if (user_rmmod) {
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#ifdef CONFIG_PM_SLEEP
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if (adapter->is_suspended)
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@ -307,6 +312,17 @@ static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data)
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return 0;
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}
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/* This function reads u8 data from PCIE card register. */
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static int mwifiex_read_reg_byte(struct mwifiex_adapter *adapter,
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int reg, u8 *data)
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{
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struct pcie_service_card *card = adapter->card;
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*data = ioread8(card->pci_mmap1 + reg);
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return 0;
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}
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/*
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* This function adds delay loop to ensure FW is awake before proceeding.
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*/
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@ -2172,6 +2188,215 @@ static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type,
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return 0;
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}
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/* This function read/write firmware */
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static enum rdwr_status
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mwifiex_pcie_rdwr_firmware(struct mwifiex_adapter *adapter, u8 doneflag)
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{
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int ret, tries;
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u8 ctrl_data;
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ret = mwifiex_write_reg(adapter, DEBUG_DUMP_CTRL_REG, DEBUG_HOST_READY);
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if (ret) {
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dev_err(adapter->dev, "PCIE write err\n");
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return RDWR_STATUS_FAILURE;
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}
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for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
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mwifiex_read_reg_byte(adapter, DEBUG_DUMP_CTRL_REG, &ctrl_data);
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if (ctrl_data == DEBUG_FW_DONE)
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return RDWR_STATUS_SUCCESS;
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if (doneflag && ctrl_data == doneflag)
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return RDWR_STATUS_DONE;
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if (ctrl_data != DEBUG_HOST_READY) {
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dev_info(adapter->dev,
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"The ctrl reg was changed, re-try again!\n");
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mwifiex_write_reg(adapter, DEBUG_DUMP_CTRL_REG,
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DEBUG_HOST_READY);
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if (ret) {
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dev_err(adapter->dev, "PCIE write err\n");
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return RDWR_STATUS_FAILURE;
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}
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}
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usleep_range(100, 200);
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}
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dev_err(adapter->dev, "Fail to pull ctrl_data\n");
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return RDWR_STATUS_FAILURE;
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}
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/* This function dump firmware memory to file */
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static void mwifiex_pcie_fw_dump_work(struct work_struct *work)
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{
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struct mwifiex_adapter *adapter =
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container_of(work, struct mwifiex_adapter, iface_work);
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unsigned int reg, reg_start, reg_end;
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u8 *dbg_ptr;
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struct timeval t;
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u8 dump_num = 0, idx, i, read_reg, doneflag = 0;
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enum rdwr_status stat;
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u32 memory_size;
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u8 filename[MAX_FULL_NAME_LEN];
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mm_segment_t fs;
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loff_t pos;
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u8 *end_ptr;
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u8 *name_prefix = "/var/log/fw_dump_";
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struct memory_type_mapping mem_type_mapping_tbl[] = {
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{"ITCM", NULL, NULL, 0xF0},
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{"DTCM", NULL, NULL, 0xF1},
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{"SQRAM", NULL, NULL, 0xF2},
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{"IRAM", NULL, NULL, 0xF3},
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};
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if (!adapter) {
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dev_err(adapter->dev, "Could not dump firmwware info\n");
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return;
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}
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do_gettimeofday(&t);
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dev_info(adapter->dev, "== mwifiex firmware dump start: %u.%06u ==\n",
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(u32)t.tv_sec, (u32)t.tv_usec);
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/* Read the number of the memories which will dump */
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stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
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if (stat == RDWR_STATUS_FAILURE)
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goto done;
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reg = DEBUG_DUMP_START_REG;
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mwifiex_read_reg_byte(adapter, reg, &dump_num);
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/* Read the length of every memory which will dump */
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for (idx = 0; idx < dump_num; idx++) {
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struct memory_type_mapping *entry = &mem_type_mapping_tbl[idx];
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stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
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if (stat == RDWR_STATUS_FAILURE)
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goto done;
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memory_size = 0;
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reg = DEBUG_DUMP_START_REG;
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for (i = 0; i < 4; i++) {
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mwifiex_read_reg_byte(adapter, reg, &read_reg);
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memory_size |= (read_reg << (i * 8));
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reg++;
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}
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if (memory_size == 0) {
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dev_info(adapter->dev, "Firmware dump Finished!\n");
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break;
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}
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dev_info(adapter->dev,
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"%s_SIZE=0x%x\n", entry->mem_name, memory_size);
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entry->mem_ptr = vmalloc(memory_size + 1);
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if (!entry->mem_ptr) {
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dev_err(adapter->dev,
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"Vmalloc %s failed\n", entry->mem_name);
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goto done;
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}
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dbg_ptr = entry->mem_ptr;
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end_ptr = dbg_ptr + memory_size;
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doneflag = entry->done_flag;
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do_gettimeofday(&t);
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dev_info(adapter->dev, "Start %s output %u.%06u, please wait...\n",
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entry->mem_name, (u32)t.tv_sec, (u32)t.tv_usec);
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do {
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stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
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if (RDWR_STATUS_FAILURE == stat)
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goto done;
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reg_start = DEBUG_DUMP_START_REG;
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reg_end = DEBUG_DUMP_END_REG;
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for (reg = reg_start; reg <= reg_end; reg++) {
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mwifiex_read_reg_byte(adapter, reg, dbg_ptr);
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if (dbg_ptr < end_ptr)
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dbg_ptr++;
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else
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dev_err(adapter->dev,
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"Allocated buf not enough\n");
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}
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if (stat != RDWR_STATUS_DONE)
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continue;
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dev_info(adapter->dev, "%s done: size=0x%lx\n",
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entry->mem_name, dbg_ptr - entry->mem_ptr);
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memset(filename, 0, sizeof(filename));
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memcpy(filename, name_prefix, strlen(name_prefix));
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strcat(filename, entry->mem_name);
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do_gettimeofday(&t);
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entry->file_mem = filp_open(filename, O_CREAT | O_RDWR,
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0644);
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if (IS_ERR(entry->file_mem)) {
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dev_info(adapter->dev,
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"Create %s file failed at %s, opening another dir /tmp\n",
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entry->mem_name, filename);
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memset(filename, 0, sizeof(filename));
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sprintf(filename, "%s%s", "/tmp/fw_dump_",
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entry->mem_name);
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entry->file_mem =
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filp_open(filename,
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O_CREAT | O_RDWR, 0644);
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}
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if (!IS_ERR(entry->file_mem)) {
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dev_info(adapter->dev,
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"Start to save the output : %u.%06u, please wait...\n",
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(u32)t.tv_sec, (u32)t.tv_usec);
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fs = get_fs();
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set_fs(KERNEL_DS);
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pos = 0;
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vfs_write(entry->file_mem,
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(char __user *)entry->mem_ptr,
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memory_size, &pos);
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filp_close(entry->file_mem, NULL);
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set_fs(fs);
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dev_info(adapter->dev,
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"The output %s have been saved to file successfully!\n",
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entry->mem_name);
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} else {
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dev_err(adapter->dev,
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"Failed to create file %s\n", filename);
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}
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vfree(entry->mem_ptr);
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entry->mem_ptr = NULL;
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break;
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} while (true);
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}
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do_gettimeofday(&t);
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dev_info(adapter->dev, "== mwifiex firmware dump end: %u.%06u ==\n",
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(u32)t.tv_sec, (u32)t.tv_usec);
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done:
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for (idx = 0; idx < ARRAY_SIZE(mem_type_mapping_tbl); idx++) {
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struct memory_type_mapping *entry = &mem_type_mapping_tbl[idx];
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if (entry->mem_ptr) {
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vfree(entry->mem_ptr);
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entry->mem_ptr = NULL;
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}
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}
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return;
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}
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static void mwifiex_pcie_work(struct work_struct *work)
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{
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if (test_and_clear_bit(MWIFIEX_PCIE_WORK_FW_DUMP, &pcie_work_flags))
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mwifiex_pcie_fw_dump_work(work);
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}
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/* This function dumps FW information */
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static void mwifiex_pcie_fw_dump(struct mwifiex_adapter *adapter)
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{
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if (test_bit(MWIFIEX_PCIE_WORK_FW_DUMP, &pcie_work_flags))
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return;
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set_bit(MWIFIEX_PCIE_WORK_FW_DUMP, &pcie_work_flags);
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schedule_work(&adapter->iface_work);
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}
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/*
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* This function initializes the PCI-E host memory space, WCB rings, etc.
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*
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@ -2393,6 +2618,8 @@ static struct mwifiex_if_ops pcie_ops = {
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.cleanup_mpa_buf = NULL,
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.init_fw_port = mwifiex_pcie_init_fw_port,
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.clean_pcie_ring = mwifiex_clean_pcie_ring_buf,
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.fw_dump = mwifiex_pcie_fw_dump,
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.iface_work = mwifiex_pcie_work,
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};
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/*
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@ -100,6 +100,28 @@
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#define MWIFIEX_DEF_SLEEP_COOKIE 0xBEEFBEEF
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#define MWIFIEX_MAX_DELAY_COUNT 5
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#define DEBUG_DUMP_CTRL_REG 0xCF4
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#define DEBUG_DUMP_START_REG 0xCF8
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#define DEBUG_DUMP_END_REG 0xCFF
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#define DEBUG_HOST_READY 0xEE
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#define DEBUG_FW_DONE 0xFF
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#define MAX_NAME_LEN 8
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#define MAX_FULL_NAME_LEN 32
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struct memory_type_mapping {
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u8 mem_name[MAX_NAME_LEN];
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u8 *mem_ptr;
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struct file *file_mem;
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u8 done_flag;
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};
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enum rdwr_status {
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RDWR_STATUS_SUCCESS = 0,
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RDWR_STATUS_FAILURE = 1,
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RDWR_STATUS_DONE = 2
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};
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struct mwifiex_pcie_card_reg {
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u16 cmd_addr_lo;
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u16 cmd_addr_hi;
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@ -322,4 +344,9 @@ mwifiex_pcie_txbd_not_full(struct pcie_service_card *card)
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return 0;
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}
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enum mwifiex_pcie_work_flags {
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MWIFIEX_PCIE_WORK_FW_DUMP,
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};
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#endif /* _MWIFIEX_PCIE_H */
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