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ARM: ux500: move AB8500 PWM out settings to device tree
This moves the muxing and biasing of the AB8500 PWM output pins over to the device tree for affected platforms. Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -32,7 +32,8 @@
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<&gpio42_default_mode>,
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<&gpio42_default_mode>,
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<&gpio26_default_mode>,
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<&gpio26_default_mode>,
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<&gpio35_default_mode>,
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<&gpio35_default_mode>,
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<&ycbcr_default_mode>;
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<&ycbcr_default_mode>,
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<&pwm_default_mode>;
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/*
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/*
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* Pins 2, 4, 10, 11, 12, 13, 16, 24, 25, 36, 37, 38, 39 and 42
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* Pins 2, 4, 10, 11, 12, 13, 16, 24, 25, 36, 37, 38, 39 and 42
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@ -267,6 +268,21 @@
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};
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};
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};
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};
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};
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};
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/* This sets up the PWM pins 14 and 15 */
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pwm {
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pwm_default_mode: pwm_default {
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default_mux {
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ste,function = "pwmout";
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ste,pins = "pwmout1_d_1", "pwmout2_d_1";
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};
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default_cfg {
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ste,pins = "GPIO14_F14",
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"GPIO15_B17";
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input-enable;
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bias-pull-down;
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};
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};
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};
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};
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};
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};
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};
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};
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};
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@ -56,16 +56,6 @@ static struct pinctrl_map __initdata ab8500_pinmap[] = {
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AB8500_MUX_STATE("gpio3_a_1", "gpio", "regulator.36", PINCTRL_STATE_SLEEP),
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AB8500_MUX_STATE("gpio3_a_1", "gpio", "regulator.36", PINCTRL_STATE_SLEEP),
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AB8500_PIN_STATE("GPIO3_U9", in_pd, "regulator.36", PINCTRL_STATE_SLEEP),
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AB8500_PIN_STATE("GPIO3_U9", in_pd, "regulator.36", PINCTRL_STATE_SLEEP),
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/*
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* pins 14,15 are muxed in PWM1 and PWM2
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* configured in INPUT PULL DOWN
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*/
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AB8500_MUX_HOG("pwmout1_d_1", "pwmout"),
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AB8500_PIN_HOG("GPIO14_F14", in_pd),
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AB8500_MUX_HOG("pwmout2_d_1", "pwmout"),
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AB8500_PIN_HOG("GPIO15_B17", in_pd),
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/*
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/*
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* pins 17,18,19 and 20 are muxed in AUDIO interface 1
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* pins 17,18,19 and 20 are muxed in AUDIO interface 1
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* configured in INPUT PULL DOWN
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* configured in INPUT PULL DOWN
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