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coresight: STM: Clean up __iomem type usage
The casting and other things here is odd, and causes sparse to complain: drivers/hwtracing/coresight/coresight-stm.c:279:35: warning: incorrect type in argument 1 (different address spaces) drivers/hwtracing/coresight/coresight-stm.c:279:35: expected void [noderef] <asn:2>*addr drivers/hwtracing/coresight/coresight-stm.c:279:35: got struct stm_drvdata *drvdata drivers/hwtracing/coresight/coresight-stm.c:327:17: warning: incorrect type in argument 2 (different address spaces) drivers/hwtracing/coresight/coresight-stm.c:327:17: expected void volatile [noderef] <asn:2>*addr drivers/hwtracing/coresight/coresight-stm.c:327:17: got void *addr drivers/hwtracing/coresight/coresight-stm.c:330:17: warning: incorrect type in argument 2 (different address spaces) drivers/hwtracing/coresight/coresight-stm.c:330:17: expected void volatile [noderef] <asn:2>*addr drivers/hwtracing/coresight/coresight-stm.c:330:17: got void *addr drivers/hwtracing/coresight/coresight-stm.c:333:17: warning: incorrect type in argument 2 (different address spaces) drivers/hwtracing/coresight/coresight-stm.c:333:17: expected void volatile [noderef] <asn:2>*addr drivers/hwtracing/coresight/coresight-stm.c:333:17: got void *addr >From what I can tell, we don't really need to treat ch_addr as anything besides a pointer, and we can just do pointer math instead of ORing in the bits of the offset and achieve the same thing. Also, we were passing a drvdata pointer to the coresight_timeout() function, but we really wanted to pass the address of the register base. Luckily the base is the first member of the structure, so everything works out, but this is quite unsafe if we ever change the structure layout. Clean this all up so sparse stops complaining on this code. Reported-by: Satyajit Desai <sadesai@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -276,7 +276,7 @@ static void stm_disable(struct coresight_device *csdev,
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spin_unlock(&drvdata->spinlock);
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/* Wait until the engine has completely stopped */
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coresight_timeout(drvdata, STMTCSR, STMTCSR_BUSY_BIT, 0);
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coresight_timeout(drvdata->base, STMTCSR, STMTCSR_BUSY_BIT, 0);
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pm_runtime_put(drvdata->dev);
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@ -307,7 +307,8 @@ static inline bool stm_addr_unaligned(const void *addr, u8 write_bytes)
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return ((unsigned long)addr & (write_bytes - 1));
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}
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static void stm_send(void *addr, const void *data, u32 size, u8 write_bytes)
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static void stm_send(void __iomem *addr, const void *data,
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u32 size, u8 write_bytes)
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{
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u8 paload[8];
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@ -414,7 +415,7 @@ static ssize_t notrace stm_generic_packet(struct stm_data *stm_data,
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unsigned int size,
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const unsigned char *payload)
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{
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unsigned long ch_addr;
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void __iomem *ch_addr;
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struct stm_drvdata *drvdata = container_of(stm_data,
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struct stm_drvdata, stm);
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@ -424,7 +425,7 @@ static ssize_t notrace stm_generic_packet(struct stm_data *stm_data,
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if (channel >= drvdata->numsp)
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return -EINVAL;
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ch_addr = (unsigned long)stm_channel_addr(drvdata, channel);
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ch_addr = stm_channel_addr(drvdata, channel);
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flags = (flags == STP_PACKET_TIMESTAMPED) ? STM_FLAG_TIMESTAMPED : 0;
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flags |= test_bit(channel, drvdata->chs.guaranteed) ?
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@ -437,20 +438,20 @@ static ssize_t notrace stm_generic_packet(struct stm_data *stm_data,
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switch (packet) {
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case STP_PACKET_FLAG:
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ch_addr |= stm_channel_off(STM_PKT_TYPE_FLAG, flags);
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ch_addr += stm_channel_off(STM_PKT_TYPE_FLAG, flags);
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/*
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* The generic STM core sets a size of '0' on flag packets.
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* As such send a flag packet of size '1' and tell the
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* core we did so.
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*/
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stm_send((void *)ch_addr, payload, 1, drvdata->write_bytes);
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stm_send(ch_addr, payload, 1, drvdata->write_bytes);
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size = 1;
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break;
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case STP_PACKET_DATA:
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ch_addr |= stm_channel_off(STM_PKT_TYPE_DATA, flags);
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stm_send((void *)ch_addr, payload, size,
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ch_addr += stm_channel_off(STM_PKT_TYPE_DATA, flags);
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stm_send(ch_addr, payload, size,
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drvdata->write_bytes);
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break;
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