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drm/radeon/dpm: fix a typo in the rv6xx mclk setup
Need to set high for the last two entries. Looks like a copy and paste typo. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -819,7 +819,7 @@ static void rv6xx_program_memory_timing_parameters(struct radeon_device *rdev)
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POWERMODE1(calculate_memory_refresh_rate(rdev,
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pi->hw.sclks[R600_POWER_LEVEL_MEDIUM])) |
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POWERMODE2(calculate_memory_refresh_rate(rdev,
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pi->hw.sclks[R600_POWER_LEVEL_MEDIUM])) |
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pi->hw.sclks[R600_POWER_LEVEL_HIGH])) |
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POWERMODE3(calculate_memory_refresh_rate(rdev,
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pi->hw.sclks[R600_POWER_LEVEL_HIGH])));
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WREG32(ARB_RFSH_RATE, arb_refresh_rate);
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