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mtd: mtd: drop NAND_ECC_SOFT_BCH enum value
This value should not be part of nand_ecc_modes_t as it specifies algorithm not a mode. We successfully managed to introduce new "algo" field which is respected now. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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@ -959,7 +959,6 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
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break;
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case NAND_ECC_SOFT:
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case NAND_ECC_SOFT_BCH:
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if (nand->ecc.algo == NAND_ECC_BCH) {
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dev_info(&pdev->dev, "Using 4-bit SW BCH ECC scheme\n");
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break;
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@ -974,7 +973,7 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
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* Don't set layout for BCH4 SW ECC. This will be
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* generated later in nand_bch_init() later.
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*/
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if (nand->ecc.mode != NAND_ECC_SOFT_BCH) {
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if (nand->ecc.mode == NAND_ECC_HW) {
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switch (mtd->oobsize) {
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case 16:
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case 64:
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@ -179,7 +179,6 @@ static int jz4780_nand_init_ecc(struct jz4780_nand_chip *nand, struct device *de
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chip->ecc.correct = jz4780_nand_ecc_correct;
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/* fall through */
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case NAND_ECC_SOFT:
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case NAND_ECC_SOFT_BCH:
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dev_info(dev, "using %s (strength %d, size %d, bytes %d)\n",
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(nfc->bch) ? "hardware BCH" : "software ECC",
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chip->ecc.strength, chip->ecc.size, chip->ecc.bytes);
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@ -1625,7 +1625,6 @@ static int mxcnd_probe(struct platform_device *pdev)
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break;
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case NAND_ECC_SOFT:
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case NAND_ECC_SOFT_BCH:
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break;
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default:
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@ -4183,8 +4183,7 @@ static int nand_set_ecc_soft_ops(struct mtd_info *mtd)
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struct nand_chip *chip = mtd_to_nand(mtd);
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struct nand_ecc_ctrl *ecc = &chip->ecc;
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if (WARN_ON(ecc->mode != NAND_ECC_SOFT &&
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ecc->mode != NAND_ECC_SOFT_BCH))
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if (WARN_ON(ecc->mode != NAND_ECC_SOFT))
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return -EINVAL;
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switch (ecc->algo) {
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@ -4331,8 +4330,7 @@ int nand_scan_tail(struct mtd_info *mtd)
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* If no default placement scheme is given, select an appropriate one.
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*/
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if (!mtd->ooblayout &&
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!((ecc->mode == NAND_ECC_SOFT || ecc->mode == NAND_ECC_SOFT_BCH) &&
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ecc->algo == NAND_ECC_BCH)) {
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!(ecc->mode == NAND_ECC_SOFT && ecc->algo == NAND_ECC_BCH)) {
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switch (mtd->oobsize) {
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case 8:
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case 16:
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@ -4426,7 +4424,6 @@ int nand_scan_tail(struct mtd_info *mtd)
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ecc->algo = NAND_ECC_HAMMING;
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case NAND_ECC_SOFT:
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case NAND_ECC_SOFT_BCH:
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ret = nand_set_ecc_soft_ops(mtd);
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if (ret) {
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ret = -EINVAL;
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@ -4514,7 +4511,6 @@ int nand_scan_tail(struct mtd_info *mtd)
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/* Large page NAND with SOFT_ECC should support subpage reads */
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switch (ecc->mode) {
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case NAND_ECC_SOFT:
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case NAND_ECC_SOFT_BCH:
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if (chip->page_shift > 9)
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chip->options |= NAND_SUBPAGE_READ;
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break;
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@ -4614,8 +4610,7 @@ void nand_release(struct mtd_info *mtd)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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if ((chip->ecc.mode == NAND_ECC_SOFT ||
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chip->ecc.mode == NAND_ECC_SOFT_BCH) &&
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if (chip->ecc.mode == NAND_ECC_SOFT &&
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chip->ecc.algo == NAND_ECC_BCH)
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nand_bch_free((struct nand_bch_control *)chip->ecc.priv);
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@ -2339,7 +2339,7 @@ static int __init ns_init_module(void)
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retval = -EINVAL;
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goto error;
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}
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chip->ecc.mode = NAND_ECC_SOFT_BCH;
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chip->ecc.mode = NAND_ECC_SOFT;
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chip->ecc.algo = NAND_ECC_BCH;
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chip->ecc.size = 512;
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chip->ecc.strength = bch;
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@ -1612,8 +1612,6 @@ static int sunxi_nand_ecc_init(struct mtd_info *mtd, struct nand_ecc_ctrl *ecc,
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return -EINVAL;
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switch (ecc->mode) {
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case NAND_ECC_SOFT_BCH:
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break;
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case NAND_ECC_HW:
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ret = sunxi_nand_hw_ecc_ctrl_init(mtd, ecc, np);
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if (ret)
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@ -116,7 +116,6 @@ typedef enum {
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NAND_ECC_HW,
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NAND_ECC_HW_SYNDROME,
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NAND_ECC_HW_OOB_FIRST,
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NAND_ECC_SOFT_BCH,
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} nand_ecc_modes_t;
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enum nand_ecc_algo {
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