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rapidio: add DMA engine support for RIO data transfers
Adds DMA Engine framework support into RapidIO subsystem. Uses DMA Engine DMA_SLAVE interface to generate data transfers to/from remote RapidIO target devices. Introduces RapidIO-specific wrapper for prep_slave_sg() interface with an extra parameter to pass target specific information. Uses scatterlist to describe local data buffer. Address flat data buffer on a remote side. Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com> Cc: Dan Williams <dan.j.williams@intel.com> Acked-by: Vinod Koul <vinod.koul@linux.intel.com> Cc: Li Yang <leoli@freescale.com> Cc: Matt Porter <mporter@kernel.crashing.org> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -22,6 +22,20 @@ config RAPIDIO_ENABLE_RX_TX_PORTS
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ports for Input/Output direction to allow other traffic
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than Maintenance transfers.
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config RAPIDIO_DMA_ENGINE
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bool "DMA Engine support for RapidIO"
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depends on RAPIDIO
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select DMADEVICES
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select DMA_ENGINE
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help
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Say Y here if you want to use DMA Engine frameork for RapidIO data
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transfers to/from target RIO devices. RapidIO uses NREAD and
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NWRITE (NWRITE_R, SWRITE) requests to transfer data between local
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memory and memory on remote target device. You need a DMA controller
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capable to perform data transfers to/from RapidIO.
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If you are unsure about this, say Y here.
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config RAPIDIO_DEBUG
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bool "RapidIO subsystem debug messages"
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depends on RAPIDIO
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@ -1121,6 +1121,87 @@ int rio_std_route_clr_table(struct rio_mport *mport, u16 destid, u8 hopcount,
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return 0;
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}
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#ifdef CONFIG_RAPIDIO_DMA_ENGINE
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static bool rio_chan_filter(struct dma_chan *chan, void *arg)
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{
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struct rio_dev *rdev = arg;
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/* Check that DMA device belongs to the right MPORT */
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return (rdev->net->hport ==
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container_of(chan->device, struct rio_mport, dma));
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}
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/**
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* rio_request_dma - request RapidIO capable DMA channel that supports
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* specified target RapidIO device.
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* @rdev: RIO device control structure
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*
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* Returns pointer to allocated DMA channel or NULL if failed.
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*/
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struct dma_chan *rio_request_dma(struct rio_dev *rdev)
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{
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dma_cap_mask_t mask;
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struct dma_chan *dchan;
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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dchan = dma_request_channel(mask, rio_chan_filter, rdev);
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return dchan;
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}
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EXPORT_SYMBOL_GPL(rio_request_dma);
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/**
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* rio_release_dma - release specified DMA channel
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* @dchan: DMA channel to release
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*/
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void rio_release_dma(struct dma_chan *dchan)
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{
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dma_release_channel(dchan);
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}
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EXPORT_SYMBOL_GPL(rio_release_dma);
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/**
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* rio_dma_prep_slave_sg - RapidIO specific wrapper
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* for device_prep_slave_sg callback defined by DMAENGINE.
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* @rdev: RIO device control structure
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* @dchan: DMA channel to configure
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* @data: RIO specific data descriptor
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* @direction: DMA data transfer direction (TO or FROM the device)
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* @flags: dmaengine defined flags
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*
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* Initializes RapidIO capable DMA channel for the specified data transfer.
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* Uses DMA channel private extension to pass information related to remote
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* target RIO device.
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* Returns pointer to DMA transaction descriptor or NULL if failed.
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*/
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struct dma_async_tx_descriptor *rio_dma_prep_slave_sg(struct rio_dev *rdev,
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struct dma_chan *dchan, struct rio_dma_data *data,
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enum dma_transfer_direction direction, unsigned long flags)
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{
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struct dma_async_tx_descriptor *txd = NULL;
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struct rio_dma_ext rio_ext;
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if (dchan->device->device_prep_slave_sg == NULL) {
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pr_err("%s: prep_rio_sg == NULL\n", __func__);
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return NULL;
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}
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rio_ext.destid = rdev->destid;
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rio_ext.rio_addr_u = data->rio_addr_u;
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rio_ext.rio_addr = data->rio_addr;
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rio_ext.wr_type = data->wr_type;
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txd = dmaengine_prep_rio_sg(dchan, data->sg, data->sg_len,
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direction, flags, &rio_ext);
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return txd;
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}
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EXPORT_SYMBOL_GPL(rio_dma_prep_slave_sg);
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#endif /* CONFIG_RAPIDIO_DMA_ENGINE */
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static void rio_fixup_device(struct rio_dev *dev)
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{
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}
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@ -635,6 +635,18 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_sg(
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dir, flags, NULL);
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}
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#ifdef CONFIG_RAPIDIO_DMA_ENGINE
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struct rio_dma_ext;
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static inline struct dma_async_tx_descriptor *dmaengine_prep_rio_sg(
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struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len,
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enum dma_transfer_direction dir, unsigned long flags,
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struct rio_dma_ext *rio_ext)
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{
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return chan->device->device_prep_slave_sg(chan, sgl, sg_len,
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dir, flags, rio_ext);
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}
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#endif
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static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_cyclic(
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struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
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size_t period_len, enum dma_transfer_direction dir)
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@ -20,6 +20,9 @@
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#include <linux/errno.h>
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#include <linux/device.h>
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#include <linux/rio_regs.h>
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#ifdef CONFIG_RAPIDIO_DMA_ENGINE
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#include <linux/dmaengine.h>
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#endif
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#define RIO_NO_HOPCOUNT -1
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#define RIO_INVALID_DESTID 0xffff
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@ -254,6 +257,9 @@ struct rio_mport {
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u32 phys_efptr;
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unsigned char name[40];
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void *priv; /* Master port private data */
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#ifdef CONFIG_RAPIDIO_DMA_ENGINE
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struct dma_device dma;
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#endif
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};
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/**
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@ -395,6 +401,47 @@ union rio_pw_msg {
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u32 raw[RIO_PW_MSG_SIZE/sizeof(u32)];
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};
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#ifdef CONFIG_RAPIDIO_DMA_ENGINE
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/**
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* enum rio_write_type - RIO write transaction types used in DMA transfers
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*
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* Note: RapidIO specification defines write (NWRITE) and
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* write-with-response (NWRITE_R) data transfer operations.
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* Existing DMA controllers that service RapidIO may use one of these operations
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* for entire data transfer or their combination with only the last data packet
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* requires response.
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*/
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enum rio_write_type {
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RDW_DEFAULT, /* default method used by DMA driver */
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RDW_ALL_NWRITE, /* all packets use NWRITE */
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RDW_ALL_NWRITE_R, /* all packets use NWRITE_R */
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RDW_LAST_NWRITE_R, /* last packet uses NWRITE_R, others - NWRITE */
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};
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struct rio_dma_ext {
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u16 destid;
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u64 rio_addr; /* low 64-bits of 66-bit RapidIO address */
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u8 rio_addr_u; /* upper 2-bits of 66-bit RapidIO address */
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enum rio_write_type wr_type; /* preferred RIO write operation type */
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};
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struct rio_dma_data {
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/* Local data (as scatterlist) */
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struct scatterlist *sg; /* I/O scatter list */
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unsigned int sg_len; /* size of scatter list */
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/* Remote device address (flat buffer) */
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u64 rio_addr; /* low 64-bits of 66-bit RapidIO address */
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u8 rio_addr_u; /* upper 2-bits of 66-bit RapidIO address */
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enum rio_write_type wr_type; /* preferred RIO write operation type */
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};
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static inline struct rio_mport *dma_to_mport(struct dma_device *ddev)
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{
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return container_of(ddev, struct rio_mport, dma);
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}
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#endif /* CONFIG_RAPIDIO_DMA_ENGINE */
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/* Architecture and hardware-specific functions */
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extern int rio_register_mport(struct rio_mport *);
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extern int rio_open_inb_mbox(struct rio_mport *, void *, int, int);
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@ -377,6 +377,15 @@ void rio_unregister_driver(struct rio_driver *);
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struct rio_dev *rio_dev_get(struct rio_dev *);
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void rio_dev_put(struct rio_dev *);
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#ifdef CONFIG_RAPIDIO_DMA_ENGINE
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extern struct dma_chan *rio_request_dma(struct rio_dev *rdev);
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extern void rio_release_dma(struct dma_chan *dchan);
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extern struct dma_async_tx_descriptor *rio_dma_prep_slave_sg(
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struct rio_dev *rdev, struct dma_chan *dchan,
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struct rio_dma_data *data,
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enum dma_transfer_direction direction, unsigned long flags);
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#endif
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/**
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* rio_name - Get the unique RIO device identifier
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* @rdev: RIO device
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