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staging: et131x: Use MII register defines from mii.h
Use defines from include/linux/mii.h instead of et131x_phy.h and delete the latter defines. Signed-off-by: Mark Einon <mark.einon@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -122,7 +122,7 @@ int et131x_mdio_reset(struct mii_bus *bus)
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struct net_device *netdev = bus->priv;
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struct et131x_adapter *adapter = netdev_priv(netdev);
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et131x_mii_write(adapter, PHY_CONTROL, 0x8000);
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et131x_mii_write(adapter, MII_BMCR, 0x8000);
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return 0;
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}
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@ -292,11 +292,11 @@ void et1310_phy_power_down(struct et131x_adapter *adapter, bool down)
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{
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u16 data;
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et131x_mii_read(adapter, PHY_CONTROL, &data);
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et131x_mii_read(adapter, MII_BMCR, &data);
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data &= ~0x0800; /* Power UP */
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if (down) /* Power DOWN */
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data |= 0x0800;
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et131x_mii_write(adapter, PHY_CONTROL, data);
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et131x_mii_write(adapter, MII_BMCR, data);
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}
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/**
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@ -328,10 +328,10 @@ static void et1310_phy_link_status(struct et131x_adapter *adapter,
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u16 vmi_phystatus = 0;
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u16 control = 0;
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et131x_mii_read(adapter, PHY_STATUS, &mistatus);
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et131x_mii_read(adapter, PHY_1000_STATUS, &is1000BaseT);
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et131x_mii_read(adapter, MII_BMSR, &mistatus);
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et131x_mii_read(adapter, MII_STAT1000, &is1000BaseT);
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et131x_mii_read(adapter, PHY_PHY_STATUS, &vmi_phystatus);
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et131x_mii_read(adapter, PHY_CONTROL, &control);
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et131x_mii_read(adapter, MII_BMCR, &control);
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*link_status = (vmi_phystatus & 0x0040) ? 1 : 0;
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*autoneg = (control & 0x1000) ? ((vmi_phystatus & 0x0020) ?
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@ -448,8 +448,8 @@ void et131x_mii_check(struct et131x_adapter *adapter,
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u32 masterslave;
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u32 polarity;
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if (bmsr_ints & MI_BMSR_LINK_STATUS) {
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if (bmsr & MI_BMSR_LINK_STATUS) {
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if (bmsr_ints & BMSR_LSTATUS) {
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if (bmsr & BMSR_LSTATUS) {
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adapter->boot_coma = 20;
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netif_carrier_on(adapter->netdev);
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} else {
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@ -505,9 +505,9 @@ void et131x_mii_check(struct et131x_adapter *adapter,
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}
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}
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if ((bmsr_ints & MI_BMSR_AUTO_NEG_COMPLETE) ||
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(adapter->ai_force_duplex == 3 && (bmsr_ints & MI_BMSR_LINK_STATUS))) {
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if ((bmsr & MI_BMSR_AUTO_NEG_COMPLETE) ||
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if ((bmsr_ints & BMSR_ANEGCOMPLETE) ||
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(adapter->ai_force_duplex == 3 && (bmsr_ints & BMSR_LSTATUS))) {
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if ((bmsr & BMSR_ANEGCOMPLETE) ||
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adapter->ai_force_duplex == 3) {
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et1310_phy_link_status(adapter,
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&link_status, &autoneg_status,
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@ -61,24 +61,6 @@
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#include "et1310_address_map.h"
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/* MI Register Addresses */
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#define MI_CONTROL_REG 0
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#define MI_STATUS_REG 1
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#define MI_PHY_IDENTIFIER_1_REG 2
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#define MI_PHY_IDENTIFIER_2_REG 3
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#define MI_AUTONEG_ADVERTISEMENT_REG 4
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#define MI_AUTONEG_LINK_PARTNER_ABILITY_REG 5
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#define MI_AUTONEG_EXPANSION_REG 6
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#define MI_AUTONEG_NEXT_PAGE_TRANSMIT_REG 7
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#define MI_LINK_PARTNER_NEXT_PAGE_REG 8
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#define MI_1000BASET_CONTROL_REG 9
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#define MI_1000BASET_STATUS_REG 10
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#define MI_RESERVED11_REG 11
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#define MI_RESERVED12_REG 12
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#define MI_RESERVED13_REG 13
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#define MI_RESERVED14_REG 14
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#define MI_EXTENDED_STATUS_REG 15
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/* VMI Register Addresses */
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#define VMI_RESERVED16_REG 16
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#define VMI_RESERVED17_REG 17
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@ -126,134 +108,6 @@ struct mi_regs {
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u8 mi_res4[3]; /* Future use by MI working group(Reg 0x1D - 0x1F) */
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};
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/*
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* MI Register 0: Basic mode control register
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* 15: reset
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* 14: loopback
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* 13: speed_sel
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* 12: enable_autoneg
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* 11: power_down
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* 10: isolate
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* 9: restart_autoneg
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* 8: duplex_mode
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* 7: col_test
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* 6: speed_1000_sel
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* 5-0: res1
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*/
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/*
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* MI Register 1: Basic mode status register
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* 15: link_100T4
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* 14: link_100fdx
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* 13: link_100hdx
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* 12: link_10fdx
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* 11: link_10hdx
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* 10: link_100T2fdx
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* 9: link_100T2hdx
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* 8: extend_status
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* 7: res1
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* 6: preamble_supress
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* 5: auto_neg_complete
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* 4: remote_fault
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* 3: auto_neg_able
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* 2: link_status
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* 1: jabber_detect
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* 0: ext_cap
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*/
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#define MI_BMSR_LINK_STATUS 0x04
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#define MI_BMSR_AUTO_NEG_COMPLETE 0x20
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/*
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* MI Register 4: Auto-negotiation advertisement register
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*
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* 15: np_indication
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* 14: res2
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* 13: remote_fault
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* 12: res1
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* 11: cap_asmpause
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* 10: cap_pause
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* 9: cap_100T4
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* 8: cap_100fdx
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* 7: cap_100hdx
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* 6: cap_10fdx
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* 5: cap_10hdx
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* 4-0: selector
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*/
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/* MI Register 5: Auto-negotiation link partner advertisement register
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* 15: np_indication
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* 14: acknowledge
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* 13: remote_fault
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* 12: res1
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* 11: cap_asmpause
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* 10: cap_pause
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* 9: cap_100T4
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* 8: cap_100fdx
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* 7: cap_100hdx
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* 6: cap_10fdx
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* 5: cap_10hdx
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* 4-0: selector
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*/
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/* MI Register 6: Auto-negotiation expansion register
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* 15-5: reserved
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* 4: pdf
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* 3: lp_np_able
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* 2: np_able
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* 1: page_rx
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* 0: lp_an_able
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*/
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/* MI Register 7: Auto-negotiation next page transmit reg(0x07)
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* 15: np
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* 14: reserved
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* 13: msg_page
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* 12: ack2
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* 11: toggle
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* 10-0 msg
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*/
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/* MI Register 8: Link Partner Next Page Reg(0x08)
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* 15: np
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* 14: ack
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* 13: msg_page
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* 12: ack2
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* 11: toggle
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* 10-0: msg
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*/
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/* MI Register 9: 1000BaseT Control Reg(0x09)
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* 15-13: test_mode
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* 12: ms_config_en
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* 11: ms_value
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* 10: port_type
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* 9: link_1000fdx
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* 8: link_1000hdx
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* 7-0: reserved
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*/
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/* MI Register 10: 1000BaseT Status Reg(0x0A)
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* 15: ms_config_fault
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* 14: ms_resolve
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* 13: local_rx_status
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* 12: remote_rx_status
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* 11: link_1000fdx
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* 10: link_1000hdx
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* 9-8: reserved
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* 7-0: idle_err_cnt
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*/
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/* MI Register 11 - 14: Reserved Regs(0x0B - 0x0E) */
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/* MI Register 15: Extended status Reg(0x0F)
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* 15: link_1000Xfdx
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* 14: link_1000Xhdx
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* 13: link_1000fdx
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* 12: link_1000hdx
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* 11-0: reserved
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*/
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/* MI Register 16 - 18: Reserved Reg(0x10-0x12) */
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/* MI Register 19: Loopback Control Reg(0x13)
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@ -422,20 +276,6 @@ struct mi_regs {
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#define TRUEPHY_ADV_DUPLEX_BOTH \
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(TRUEPHY_ADV_DUPLEX_FULL | TRUEPHY_ADV_DUPLEX_HALF)
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#define PHY_CONTROL 0x00 /* #define TRU_MI_CONTROL_REGISTER 0 */
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#define PHY_STATUS 0x01 /* #define TRU_MI_STATUS_REGISTER 1 */
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#define PHY_ID_1 0x02 /* #define TRU_MI_PHY_IDENTIFIER_1_REGISTER 2 */
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#define PHY_ID_2 0x03 /* #define TRU_MI_PHY_IDENTIFIER_2_REGISTER 3 */
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#define PHY_AUTO_ADVERTISEMENT 0x04 /* #define TRU_MI_ADVERTISEMENT_REGISTER 4 */
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#define PHY_AUTO_LINK_PARTNER 0x05 /* #define TRU_MI_LINK_PARTNER_ABILITY_REGISTER 5 */
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#define PHY_AUTO_EXPANSION 0x06 /* #define TRU_MI_EXPANSION_REGISTER 6 */
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#define PHY_AUTO_NEXT_PAGE_TX 0x07 /* #define TRU_MI_NEXT_PAGE_TRANSMIT_REGISTER 7 */
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#define PHY_LINK_PARTNER_NEXT_PAGE 0x08 /* #define TRU_MI_LINK_PARTNER_NEXT_PAGE_REGISTER 8 */
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#define PHY_1000_CONTROL 0x09 /* #define TRU_MI_1000BASET_CONTROL_REGISTER 9 */
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#define PHY_1000_STATUS 0x0A /* #define TRU_MI_1000BASET_STATUS_REGISTER 10 */
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#define PHY_EXTENDED_STATUS 0x0F /* #define TRU_MI_EXTENDED_STATUS_REGISTER 15 */
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/* some defines for modem registers that seem to be 'reserved' */
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#define PHY_INDEX_REG 0x10
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#define PHY_DATA_REG 0x11
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@ -249,14 +249,14 @@ void et131x_error_timer_handler(unsigned long data)
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dev_err(&adapter->pdev->dev,
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"No interrupts, in PHY coma, pm_csr = 0x%x\n", pm_csr);
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if (!(adapter->bmsr & MI_BMSR_LINK_STATUS) &&
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if (!(adapter->bmsr & BMSR_LSTATUS) &&
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adapter->registry_phy_coma &&
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adapter->boot_coma < 11) {
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adapter->boot_coma++;
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}
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if (adapter->boot_coma == 10) {
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if (!(adapter->bmsr & MI_BMSR_LINK_STATUS)
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if (!(adapter->bmsr & BMSR_LSTATUS)
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&& adapter->registry_phy_coma) {
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if ((pm_csr & ET_PM_PHY_SW_COMA) == 0) {
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/* NOTE - This was originally a 'sync with
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