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https://github.com/FEX-Emu/linux.git
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drm/i915: Split array of DAC limits into separate structures.
The array of DAC limits was only ever referenced with #defined constant offsets, and keeping those #define values in sync with the array itself was a nuisance. This will make future changes to the set of DAC limits less error-prone. Signed-off-by: Keith Packard <keithp@keithp.com>
This commit is contained in:
Keith Packard
parent
c8110e52b7
commit
e4b366996b
@ -128,20 +128,6 @@ struct intel_limit {
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#define I9XX_P2_LVDS_FAST 7
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#define I9XX_P2_LVDS_SLOW_LIMIT 112000
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#define INTEL_LIMIT_I8XX_DVO_DAC 0
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#define INTEL_LIMIT_I8XX_LVDS 1
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#define INTEL_LIMIT_I9XX_SDVO_DAC 2
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#define INTEL_LIMIT_I9XX_LVDS 3
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#define INTEL_LIMIT_G4X_SDVO 4
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#define INTEL_LIMIT_G4X_HDMI_DAC 5
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#define INTEL_LIMIT_G4X_SINGLE_CHANNEL_LVDS 6
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#define INTEL_LIMIT_G4X_DUAL_CHANNEL_LVDS 7
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#define INTEL_LIMIT_G4X_DISPLAY_PORT 8
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#define INTEL_LIMIT_IGD_SDVO_DAC 9
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#define INTEL_LIMIT_IGD_LVDS 10
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#define INTEL_LIMIT_IGDNG_SDVO_DAC 11
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#define INTEL_LIMIT_IGDNG_LVDS 12
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/*The parameter is for SDVO on G4x platform*/
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#define G4X_DOT_SDVO_MIN 25000
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#define G4X_DOT_SDVO_MAX 270000
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@ -281,8 +267,7 @@ static bool
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intel_find_pll_g4x_dp(const intel_limit_t *, struct drm_crtc *crtc,
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int target, int refclk, intel_clock_t *best_clock);
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static const intel_limit_t intel_limits[] = {
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{ /* INTEL_LIMIT_I8XX_DVO_DAC */
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static const intel_limit_t intel_limits_i8xx_dvo = {
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.dot = { .min = I8XX_DOT_MIN, .max = I8XX_DOT_MAX },
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.vco = { .min = I8XX_VCO_MIN, .max = I8XX_VCO_MAX },
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.n = { .min = I8XX_N_MIN, .max = I8XX_N_MAX },
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@ -294,8 +279,9 @@ static const intel_limit_t intel_limits[] = {
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.p2 = { .dot_limit = I8XX_P2_SLOW_LIMIT,
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.p2_slow = I8XX_P2_SLOW, .p2_fast = I8XX_P2_FAST },
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.find_pll = intel_find_best_PLL,
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},
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{ /* INTEL_LIMIT_I8XX_LVDS */
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};
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static const intel_limit_t intel_limits_i8xx_lvds = {
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.dot = { .min = I8XX_DOT_MIN, .max = I8XX_DOT_MAX },
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.vco = { .min = I8XX_VCO_MIN, .max = I8XX_VCO_MAX },
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.n = { .min = I8XX_N_MIN, .max = I8XX_N_MAX },
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@ -307,8 +293,9 @@ static const intel_limit_t intel_limits[] = {
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.p2 = { .dot_limit = I8XX_P2_SLOW_LIMIT,
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.p2_slow = I8XX_P2_LVDS_SLOW, .p2_fast = I8XX_P2_LVDS_FAST },
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.find_pll = intel_find_best_PLL,
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},
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{ /* INTEL_LIMIT_I9XX_SDVO_DAC */
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};
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static const intel_limit_t intel_limits_i9xx_sdvo = {
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.dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX },
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.vco = { .min = I9XX_VCO_MIN, .max = I9XX_VCO_MAX },
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.n = { .min = I9XX_N_MIN, .max = I9XX_N_MAX },
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@ -320,8 +307,9 @@ static const intel_limit_t intel_limits[] = {
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.p2 = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT,
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.p2_slow = I9XX_P2_SDVO_DAC_SLOW, .p2_fast = I9XX_P2_SDVO_DAC_FAST },
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.find_pll = intel_find_best_PLL,
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},
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{ /* INTEL_LIMIT_I9XX_LVDS */
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};
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static const intel_limit_t intel_limits_i9xx_lvds = {
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.dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX },
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.vco = { .min = I9XX_VCO_MIN, .max = I9XX_VCO_MAX },
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.n = { .min = I9XX_N_MIN, .max = I9XX_N_MAX },
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@ -336,9 +324,10 @@ static const intel_limit_t intel_limits[] = {
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.p2 = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT,
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.p2_slow = I9XX_P2_LVDS_SLOW, .p2_fast = I9XX_P2_LVDS_FAST },
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.find_pll = intel_find_best_PLL,
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},
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};
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/* below parameter and function is for G4X Chipset Family*/
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{ /* INTEL_LIMIT_G4X_SDVO */
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static const intel_limit_t intel_limits_g4x_sdvo = {
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.dot = { .min = G4X_DOT_SDVO_MIN, .max = G4X_DOT_SDVO_MAX },
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.vco = { .min = G4X_VCO_MIN, .max = G4X_VCO_MAX},
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.n = { .min = G4X_N_SDVO_MIN, .max = G4X_N_SDVO_MAX },
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@ -352,8 +341,9 @@ static const intel_limit_t intel_limits[] = {
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.p2_fast = G4X_P2_SDVO_FAST
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},
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.find_pll = intel_g4x_find_best_PLL,
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},
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{ /* INTEL_LIMIT_G4X_HDMI_DAC */
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};
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static const intel_limit_t intel_limits_g4x_hdmi = {
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.dot = { .min = G4X_DOT_HDMI_DAC_MIN, .max = G4X_DOT_HDMI_DAC_MAX },
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.vco = { .min = G4X_VCO_MIN, .max = G4X_VCO_MAX},
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.n = { .min = G4X_N_HDMI_DAC_MIN, .max = G4X_N_HDMI_DAC_MAX },
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@ -367,8 +357,9 @@ static const intel_limit_t intel_limits[] = {
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.p2_fast = G4X_P2_HDMI_DAC_FAST
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},
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.find_pll = intel_g4x_find_best_PLL,
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},
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{ /* INTEL_LIMIT_G4X_SINGLE_CHANNEL_LVDS */
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};
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static const intel_limit_t intel_limits_g4x_single_channel_lvds = {
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.dot = { .min = G4X_DOT_SINGLE_CHANNEL_LVDS_MIN,
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.max = G4X_DOT_SINGLE_CHANNEL_LVDS_MAX },
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.vco = { .min = G4X_VCO_MIN,
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@ -390,8 +381,9 @@ static const intel_limit_t intel_limits[] = {
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.p2_fast = G4X_P2_SINGLE_CHANNEL_LVDS_FAST
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},
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.find_pll = intel_g4x_find_best_PLL,
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},
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{ /* INTEL_LIMIT_G4X_DUAL_CHANNEL_LVDS */
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};
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static const intel_limit_t intel_limits_g4x_dual_channel_lvds = {
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.dot = { .min = G4X_DOT_DUAL_CHANNEL_LVDS_MIN,
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.max = G4X_DOT_DUAL_CHANNEL_LVDS_MAX },
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.vco = { .min = G4X_VCO_MIN,
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@ -413,8 +405,9 @@ static const intel_limit_t intel_limits[] = {
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.p2_fast = G4X_P2_DUAL_CHANNEL_LVDS_FAST
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},
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.find_pll = intel_g4x_find_best_PLL,
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},
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{ /* INTEL_LIMIT_G4X_DISPLAY_PORT */
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};
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static const intel_limit_t intel_limits_g4x_display_port = {
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.dot = { .min = G4X_DOT_DISPLAY_PORT_MIN,
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.max = G4X_DOT_DISPLAY_PORT_MAX },
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.vco = { .min = G4X_VCO_MIN,
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@ -435,8 +428,9 @@ static const intel_limit_t intel_limits[] = {
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.p2_slow = G4X_P2_DISPLAY_PORT_SLOW,
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.p2_fast = G4X_P2_DISPLAY_PORT_FAST },
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.find_pll = intel_find_pll_g4x_dp,
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},
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{ /* INTEL_LIMIT_IGD_SDVO */
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};
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static const intel_limit_t intel_limits_igd_sdvo = {
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.dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX},
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.vco = { .min = IGD_VCO_MIN, .max = IGD_VCO_MAX },
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.n = { .min = IGD_N_MIN, .max = IGD_N_MAX },
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@ -448,8 +442,9 @@ static const intel_limit_t intel_limits[] = {
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.p2 = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT,
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.p2_slow = I9XX_P2_SDVO_DAC_SLOW, .p2_fast = I9XX_P2_SDVO_DAC_FAST },
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.find_pll = intel_find_best_PLL,
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},
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{ /* INTEL_LIMIT_IGD_LVDS */
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};
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static const intel_limit_t intel_limits_igd_lvds = {
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.dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX },
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.vco = { .min = IGD_VCO_MIN, .max = IGD_VCO_MAX },
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.n = { .min = IGD_N_MIN, .max = IGD_N_MAX },
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@ -462,8 +457,9 @@ static const intel_limit_t intel_limits[] = {
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.p2 = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT,
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.p2_slow = I9XX_P2_LVDS_SLOW, .p2_fast = I9XX_P2_LVDS_SLOW },
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.find_pll = intel_find_best_PLL,
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},
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{ /* INTEL_LIMIT_IGDNG_SDVO_DAC */
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};
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static const intel_limit_t intel_limits_igdng_sdvo = {
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.dot = { .min = IGDNG_DOT_MIN, .max = IGDNG_DOT_MAX },
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.vco = { .min = IGDNG_VCO_MIN, .max = IGDNG_VCO_MAX },
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.n = { .min = IGDNG_N_MIN, .max = IGDNG_N_MAX },
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@ -476,8 +472,9 @@ static const intel_limit_t intel_limits[] = {
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.p2_slow = IGDNG_P2_SDVO_DAC_SLOW,
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.p2_fast = IGDNG_P2_SDVO_DAC_FAST },
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.find_pll = intel_igdng_find_best_PLL,
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},
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{ /* INTEL_LIMIT_IGDNG_LVDS */
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};
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static const intel_limit_t intel_limits_igdng_lvds = {
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.dot = { .min = IGDNG_DOT_MIN, .max = IGDNG_DOT_MAX },
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.vco = { .min = IGDNG_VCO_MIN, .max = IGDNG_VCO_MAX },
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.n = { .min = IGDNG_N_MIN, .max = IGDNG_N_MAX },
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@ -490,16 +487,15 @@ static const intel_limit_t intel_limits[] = {
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.p2_slow = IGDNG_P2_LVDS_SLOW,
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.p2_fast = IGDNG_P2_LVDS_FAST },
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.find_pll = intel_igdng_find_best_PLL,
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},
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};
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static const intel_limit_t *intel_igdng_limit(struct drm_crtc *crtc)
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{
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const intel_limit_t *limit;
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if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
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limit = &intel_limits[INTEL_LIMIT_IGDNG_LVDS];
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limit = &intel_limits_igdng_lvds;
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else
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limit = &intel_limits[INTEL_LIMIT_IGDNG_SDVO_DAC];
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limit = &intel_limits_igdng_sdvo;
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return limit;
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}
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@ -514,21 +510,19 @@ static const intel_limit_t *intel_g4x_limit(struct drm_crtc *crtc)
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if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) ==
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LVDS_CLKB_POWER_UP)
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/* LVDS with dual channel */
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limit = &intel_limits
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[INTEL_LIMIT_G4X_DUAL_CHANNEL_LVDS];
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limit = &intel_limits_g4x_dual_channel_lvds;
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else
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/* LVDS with dual channel */
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limit = &intel_limits
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[INTEL_LIMIT_G4X_SINGLE_CHANNEL_LVDS];
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limit = &intel_limits_g4x_single_channel_lvds;
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} else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_HDMI) ||
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intel_pipe_has_type(crtc, INTEL_OUTPUT_ANALOG)) {
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limit = &intel_limits[INTEL_LIMIT_G4X_HDMI_DAC];
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limit = &intel_limits_g4x_hdmi;
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} else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_SDVO)) {
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limit = &intel_limits[INTEL_LIMIT_G4X_SDVO];
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limit = &intel_limits_g4x_sdvo;
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} else if (intel_pipe_has_type (crtc, INTEL_OUTPUT_DISPLAYPORT)) {
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limit = &intel_limits[INTEL_LIMIT_G4X_DISPLAY_PORT];
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limit = &intel_limits_g4x_display_port;
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} else /* The option is for other outputs */
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limit = &intel_limits[INTEL_LIMIT_I9XX_SDVO_DAC];
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limit = &intel_limits_i9xx_sdvo;
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return limit;
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}
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@ -544,19 +538,19 @@ static const intel_limit_t *intel_limit(struct drm_crtc *crtc)
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limit = intel_g4x_limit(crtc);
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} else if (IS_I9XX(dev) && !IS_IGD(dev)) {
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if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
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limit = &intel_limits[INTEL_LIMIT_I9XX_LVDS];
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limit = &intel_limits_i9xx_lvds;
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else
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limit = &intel_limits[INTEL_LIMIT_I9XX_SDVO_DAC];
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limit = &intel_limits_i9xx_sdvo;
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} else if (IS_IGD(dev)) {
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if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
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limit = &intel_limits[INTEL_LIMIT_IGD_LVDS];
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limit = &intel_limits_igd_lvds;
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else
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limit = &intel_limits[INTEL_LIMIT_IGD_SDVO_DAC];
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limit = &intel_limits_igd_sdvo;
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} else {
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if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
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limit = &intel_limits[INTEL_LIMIT_I8XX_LVDS];
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limit = &intel_limits_i8xx_lvds;
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else
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limit = &intel_limits[INTEL_LIMIT_I8XX_DVO_DAC];
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limit = &intel_limits_i8xx_dvo;
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}
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return limit;
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}
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