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ARM: CSR: PM: save/restore timer status in suspend cycle
SiRFprimaII will lose power in deepsleep mode except rtc, pmu and sdram self-refresh. This patch saves timer-related registers while suspending and restore them while resuming. Signed-off-by: Barry Song <baohua.song@csr.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
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@ -40,6 +40,17 @@
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#define SIRFSOC_TIMER_LATCH_BIT BIT(0)
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#define SIRFSOC_TIMER_REG_CNT 11
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static const u32 sirfsoc_timer_reg_list[SIRFSOC_TIMER_REG_CNT] = {
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SIRFSOC_TIMER_MATCH_0, SIRFSOC_TIMER_MATCH_1, SIRFSOC_TIMER_MATCH_2,
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SIRFSOC_TIMER_MATCH_3, SIRFSOC_TIMER_MATCH_4, SIRFSOC_TIMER_MATCH_5,
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SIRFSOC_TIMER_INT_EN, SIRFSOC_TIMER_WATCHDOG_EN, SIRFSOC_TIMER_DIV,
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SIRFSOC_TIMER_LATCHED_LO, SIRFSOC_TIMER_LATCHED_HI,
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};
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static u32 sirfsoc_timer_reg_val[SIRFSOC_TIMER_REG_CNT];
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static void __iomem *sirfsoc_timer_base;
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static void __init sirfsoc_of_timer_map(void);
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@ -106,6 +117,27 @@ static void sirfsoc_timer_set_mode(enum clock_event_mode mode,
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}
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}
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static void sirfsoc_clocksource_suspend(struct clocksource *cs)
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{
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int i;
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writel_relaxed(SIRFSOC_TIMER_LATCH_BIT, sirfsoc_timer_base + SIRFSOC_TIMER_LATCH);
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for (i = 0; i < SIRFSOC_TIMER_REG_CNT; i++)
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sirfsoc_timer_reg_val[i] = readl_relaxed(sirfsoc_timer_base + sirfsoc_timer_reg_list[i]);
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}
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static void sirfsoc_clocksource_resume(struct clocksource *cs)
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{
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int i;
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for (i = 0; i < SIRFSOC_TIMER_REG_CNT; i++)
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writel_relaxed(sirfsoc_timer_reg_val[i], sirfsoc_timer_base + sirfsoc_timer_reg_list[i]);
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writel_relaxed(sirfsoc_timer_reg_val[i - 2], sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_LO);
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writel_relaxed(sirfsoc_timer_reg_val[i - 1], sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_HI);
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}
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static struct clock_event_device sirfsoc_clockevent = {
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.name = "sirfsoc_clockevent",
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.rating = 200,
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@ -120,6 +152,8 @@ static struct clocksource sirfsoc_clocksource = {
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.mask = CLOCKSOURCE_MASK(64),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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.read = sirfsoc_timer_read,
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.suspend = sirfsoc_clocksource_suspend,
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.resume = sirfsoc_clocksource_resume,
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};
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static struct irqaction sirfsoc_timer_irq = {
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