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ARM: restart: only perform setup for restart when soft-restarting
We only need to set the system up for a soft-restart if we're going to be doing a soft-restart. Provide a new function (soft_restart()) which does the setup and final call for this, and make platforms use it. Eliminate the call to setup_restart() from the default handler. This means that platforms arch_reset() function is no longer called with the page tables prepared for a soft-restart, and caches will still be enabled. Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Krzysztof Ha■asa <khc@pm.waw.pl> Acked-by: Paul Mundt <lethal@linux-sh.org> Acked-by: Richard Purdie <richard.purdie@linuxfoundation.org> Acked-by: Wan ZongShun <mcuos.com@gmail.com> Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -101,6 +101,7 @@ extern int __pure cpu_architecture(void);
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extern void cpu_init(void);
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void arm_machine_restart(char mode, const char *cmd);
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void soft_restart(unsigned long);
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extern void (*arm_pm_restart)(char str, const char *cmd);
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#define UDBG_UNDEFINED (1 << 0)
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@ -92,7 +92,7 @@ static int __init hlt_setup(char *__unused)
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__setup("nohlt", nohlt_setup);
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__setup("hlt", hlt_setup);
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void arm_machine_restart(char mode, const char *cmd)
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void soft_restart(unsigned long addr)
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{
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/* Disable interrupts first */
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local_irq_disable();
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@ -114,7 +114,16 @@ void arm_machine_restart(char mode, const char *cmd)
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/* Push out any further dirty data, and ensure cache is empty */
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flush_cache_all();
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/* Now call the architecture specific reboot code. */
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cpu_reset(addr);
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}
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void arm_machine_restart(char mode, const char *cmd)
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{
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/* Disable interrupts first */
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local_irq_disable();
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local_fiq_disable();
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/* Call the architecture specific reboot code. */
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arch_reset(mode, cmd);
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}
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@ -34,7 +34,7 @@ static inline void arch_idle(void)
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static inline void arch_reset(char mode, const char *cmd)
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{
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cpu_reset(0);
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soft_restart(0);
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}
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#endif
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@ -34,6 +34,6 @@ static inline void arch_idle(void)
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asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
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}
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#define arch_reset(mode, cmd) cpu_reset(0x80000000)
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#define arch_reset(mode, cmd) soft_restart(0x80000000)
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#endif
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@ -24,7 +24,7 @@ static inline void arch_reset(char mode, const char *cmd)
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/*
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* Jump into the ROM
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*/
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cpu_reset(0x41000000);
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soft_restart(0x41000000);
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} else {
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if (machine_is_netwinder()) {
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/* open up the SuperIO chip
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@ -30,5 +30,5 @@ static inline void arch_reset(char mode, const char *cmd)
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*IOP3XX_PCSR = 0x30;
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/* Jump into ROM at address 0 */
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cpu_reset(0);
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soft_restart(0);
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}
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@ -19,5 +19,5 @@ static inline void arch_reset(char mode, const char *cmd)
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*IOP3XX_PCSR = 0x30;
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/* Jump into ROM at address 0 */
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cpu_reset(0);
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soft_restart(0);
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}
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@ -26,7 +26,7 @@ static inline void arch_reset(char mode, const char *cmd)
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{
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if ( 1 && mode == 's') {
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/* Jump into ROM at address 0 */
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cpu_reset(0);
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soft_restart(0);
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} else {
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/* Use on-chip reset capability */
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@ -32,7 +32,7 @@ static void arch_reset(char mode, const char *cmd)
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unsigned int reg;
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if (mode == 's')
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cpu_reset(0);
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soft_restart(0);
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/* disable timer0 */
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reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
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@ -19,8 +19,8 @@ static inline void arch_idle(void)
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static inline void arch_reset(char mode, const char *cmd)
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{
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if (cpu_is_pxa168())
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cpu_reset(0xffff0000);
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soft_restart(0xffff0000);
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else
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cpu_reset(0);
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soft_restart(0);
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}
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#endif /* __ASM_MACH_SYSTEM_H */
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@ -53,7 +53,7 @@ void arch_reset(char mode, const char *cmd)
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mdelay(50);
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/* We'll take a jump through zero as a poor second */
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cpu_reset(0);
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soft_restart(0);
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}
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static int __init mxs_arch_reset_init(void)
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@ -32,7 +32,7 @@ static void arch_idle(void)
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static inline void arch_reset(char mode, const char *cmd)
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{
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cpu_reset(0);
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soft_restart(0);
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}
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#endif
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@ -88,7 +88,7 @@ void arch_reset(char mode, const char *cmd)
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switch (mode) {
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case 's':
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/* Jump into ROM at address 0 */
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cpu_reset(0);
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soft_restart(0);
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break;
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case 'g':
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do_gpio_reset();
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@ -23,5 +23,5 @@ static inline void arch_reset(char mode, const char *cmd)
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/*
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* Jump into the ROM
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*/
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cpu_reset(0);
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soft_restart(0);
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}
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@ -19,7 +19,7 @@ static void
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arch_reset(char mode, const char *cmd)
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{
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if (mode == 's') {
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cpu_reset(0);
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soft_restart(0);
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}
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if (s3c24xx_reset_hook)
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@ -28,5 +28,5 @@ arch_reset(char mode, const char *cmd)
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arch_wdt_reset();
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/* we'll take a jump through zero as a poor second */
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cpu_reset(0);
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soft_restart(0);
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}
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@ -24,7 +24,7 @@ static void arch_reset(char mode, const char *cmd)
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arch_wdt_reset();
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/* if all else fails, or mode was for soft, jump to 0 */
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cpu_reset(0);
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soft_restart(0);
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}
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#endif /* __ASM_ARCH_IRQ_H */
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@ -14,7 +14,7 @@ static inline void arch_reset(char mode, const char *cmd)
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{
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if (mode == 's') {
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/* Jump into ROM at address 0 */
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cpu_reset(0);
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soft_restart(0);
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} else {
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/* Use on-chip reset capability */
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RSRR = RSRR_SWR;
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@ -8,7 +8,7 @@ static inline void arch_idle(void)
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static inline void arch_reset(char mode, const char *cmd)
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{
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cpu_reset(0);
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soft_restart(0);
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}
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#endif
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@ -33,7 +33,7 @@ static void arch_reset(char mode, const char *cmd)
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{
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if (mode == 's') {
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/* Jump into ROM at address 0 */
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cpu_reset(0);
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soft_restart(0);
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} else {
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__raw_writel(WTE | WTRE | WTCLK, WTCR);
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}
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@ -70,7 +70,7 @@ void arch_reset(char mode, const char *cmd)
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mdelay(50);
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/* we'll take a jump through zero as a poor second */
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cpu_reset(0);
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soft_restart(0);
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}
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void mxc_arch_reset_init(void __iomem *base)
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@ -31,7 +31,7 @@ static inline void arch_reset(char mode, const char *cmd)
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{
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if (mode == 's') {
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/* software reset, Jump into ROM at address 0 */
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cpu_reset(0);
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soft_restart(0);
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} else {
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/* hardware reset, Use on-chip reset capability */
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sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE);
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