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ASoC: rsnd: Fix possible NULL pointer dereference
25165f79ad
("ASoC: rsnd: enable clock-frequency for both 44.1kHz/48kHz")
supports both 44.1kHz/48kHz clock-frequency settings for ADG
which will be used for AUDIO_OLKOUTn.
But some board doesn't need it, thus, it is not mandatory.
But, above patch didn't care about the case of "clock-frequency" DT
property was not present.
This patch ignores ADG settings if AUDIO_OLKOUTn was not used.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
[Kuninori: tidyup not to break non AUDIO_OLKOUTn case]
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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75f9e4adb5
commit
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@ -453,13 +453,18 @@ static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
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[CLKI] = 0x2,
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};
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of_property_read_u32(np, "#clock-cells", &count);
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ckr = 0;
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rbga = 2; /* default 1/6 */
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rbgb = 2; /* default 1/6 */
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/*
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* ADG supports BRRA/BRRB output only
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* this means all clkout0/1/2/3 will be same rate
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*/
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prop = of_find_property(np, "clock-frequency", NULL);
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if (!prop)
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goto rsnd_adg_get_clkout_end;
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req_size = prop->length / sizeof(u32);
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of_property_read_u32_array(np, "clock-frequency", req_rate, req_size);
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@ -472,6 +477,9 @@ static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
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req_48kHz_rate = req_rate[i];
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}
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if (req_rate[0] % 48000 == 0)
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adg->flags = AUDIO_OUT_48;
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/*
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* This driver is assuming that AUDIO_CLKA/AUDIO_CLKB/AUDIO_CLKC
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* have 44.1kHz or 48kHz base clocks for now.
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@ -481,9 +489,6 @@ static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
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* rsnd_adg_ssi_clk_try_start()
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* rsnd_ssi_master_clk_start()
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*/
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ckr = 0;
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rbga = 2; /* default 1/6 */
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rbgb = 2; /* default 1/6 */
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adg->rbga_rate_for_441khz = 0;
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adg->rbgb_rate_for_48khz = 0;
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for_each_rsnd_clk(clk, adg, i) {
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@ -528,6 +533,7 @@ static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
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* this means all clkout0/1/2/3 will be * same rate
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*/
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of_property_read_u32(np, "#clock-cells", &count);
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/*
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* for clkout
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*/
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@ -557,13 +563,11 @@ static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
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&adg->onecell);
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}
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rsnd_adg_get_clkout_end:
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adg->ckr = ckr;
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adg->rbga = rbga;
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adg->rbgb = rbgb;
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if (req_rate[0] % 48000 == 0)
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adg->flags = AUDIO_OUT_48;
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for_each_rsnd_clkout(clk, adg, i)
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dev_dbg(dev, "clkout %d : %p : %ld\n", i, clk, clk_get_rate(clk));
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dev_dbg(dev, "BRGCKR = 0x%08x, BRRA/BRRB = 0x%x/0x%x\n",
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