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m68knommu: fix MC68328.h defines
This patch fixes some broken #define's in the MC68328.h file. Most of them are whitespaces and one is an incorrect define of TCN. Signed-off-by: Luis Alves <ljalvs@gmail.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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@ -293,7 +293,7 @@
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/*
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* Here go the bitmasks themselves
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*/
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#define IMR_MSPIM (1 << SPIM _IRQ_NUM) /* Mask SPI Master interrupt */
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#define IMR_MSPIM (1 << SPIM_IRQ_NUM) /* Mask SPI Master interrupt */
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#define IMR_MTMR2 (1 << TMR2_IRQ_NUM) /* Mask Timer 2 interrupt */
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#define IMR_MUART (1 << UART_IRQ_NUM) /* Mask UART interrupt */
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#define IMR_MWDT (1 << WDT_IRQ_NUM) /* Mask Watchdog Timer interrupt */
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@ -327,7 +327,7 @@
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#define IWR_ADDR 0xfffff308
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#define IWR LONG_REF(IWR_ADDR)
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#define IWR_SPIM (1 << SPIM _IRQ_NUM) /* SPI Master interrupt */
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#define IWR_SPIM (1 << SPIM_IRQ_NUM) /* SPI Master interrupt */
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#define IWR_TMR2 (1 << TMR2_IRQ_NUM) /* Timer 2 interrupt */
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#define IWR_UART (1 << UART_IRQ_NUM) /* UART interrupt */
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#define IWR_WDT (1 << WDT_IRQ_NUM) /* Watchdog Timer interrupt */
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@ -357,7 +357,7 @@
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#define ISR_ADDR 0xfffff30c
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#define ISR LONG_REF(ISR_ADDR)
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#define ISR_SPIM (1 << SPIM _IRQ_NUM) /* SPI Master interrupt */
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#define ISR_SPIM (1 << SPIM_IRQ_NUM) /* SPI Master interrupt */
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#define ISR_TMR2 (1 << TMR2_IRQ_NUM) /* Timer 2 interrupt */
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#define ISR_UART (1 << UART_IRQ_NUM) /* UART interrupt */
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#define ISR_WDT (1 << WDT_IRQ_NUM) /* Watchdog Timer interrupt */
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@ -391,7 +391,7 @@
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#define IPR_ADDR 0xfffff310
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#define IPR LONG_REF(IPR_ADDR)
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#define IPR_SPIM (1 << SPIM _IRQ_NUM) /* SPI Master interrupt */
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#define IPR_SPIM (1 << SPIM_IRQ_NUM) /* SPI Master interrupt */
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#define IPR_TMR2 (1 << TMR2_IRQ_NUM) /* Timer 2 interrupt */
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#define IPR_UART (1 << UART_IRQ_NUM) /* UART interrupt */
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#define IPR_WDT (1 << WDT_IRQ_NUM) /* Watchdog Timer interrupt */
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@ -757,7 +757,7 @@
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/* 'EZ328-compatible definitions */
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#define TCN_ADDR TCN1_ADDR
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#define TCN TCN
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#define TCN TCN1
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/*
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* Timer Unit 1 and 2 Status Registers
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