ASoC: pcm512x: Fix divide by zero issue

If den=1 and pllin_rate>20MHz then den and num are adjusted to 0
causing a divide by zero error a few lines further on. Therefore
this patch correctly scales num and den such that
pllin_rate/den < 20MHz as required in the device data sheet.

Signed-off-by: Howard Mitchell <hm@hmbedded.co.uk>
Signed-off-by: Mark Brown <broonie@sirena.org.uk>
Cc: stable@vger.kernel.org
This commit is contained in:
Howard Mitchell 2015-03-20 21:13:45 +00:00 committed by Mark Brown
parent 4d9b13c7cc
commit f073faa736

View File

@ -576,8 +576,8 @@ static int pcm512x_find_pll_coeff(struct snd_soc_dai *dai,
/* pllin_rate / P (or here, den) cannot be greater than 20 MHz */ /* pllin_rate / P (or here, den) cannot be greater than 20 MHz */
if (pllin_rate / den > 20000000 && num < 8) { if (pllin_rate / den > 20000000 && num < 8) {
num *= 20000000 / (pllin_rate / den); num *= DIV_ROUND_UP(pllin_rate / den, 20000000);
den *= 20000000 / (pllin_rate / den); den *= DIV_ROUND_UP(pllin_rate / den, 20000000);
} }
dev_dbg(dev, "num / den = %lu / %lu\n", num, den); dev_dbg(dev, "num / den = %lu / %lu\n", num, den);