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drm/radeon: fix endian bugs in radeon_atom_get_clock_dividers() (v3)
v2: fix copy paste typo. v3: clarify new union member Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -458,6 +458,7 @@ typedef struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V3
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union
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{
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ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter
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ULONG ulClockParams; //ULONG access for BE
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ATOM_S_MPLL_FB_DIVIDER ulFbDiv; //Output Parameter
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};
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UCHAR ucRefDiv; //Output Parameter
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@ -490,6 +491,7 @@ typedef struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V5
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union
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{
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ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter
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ULONG ulClockParams; //ULONG access for BE
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ATOM_S_MPLL_FB_DIVIDER ulFbDiv; //Output Parameter
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};
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UCHAR ucRefDiv; //Output Parameter
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@ -2710,8 +2710,7 @@ int radeon_atom_get_clock_dividers(struct radeon_device *rdev,
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dividers->enable_post_div = (dividers->fb_div & 1) ? true : false;
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} else {
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if (clock_type == COMPUTE_ENGINE_PLL_PARAM) {
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args.v3.ulClock.ulComputeClockFlag = clock_type;
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args.v3.ulClock.ulClockFreq = cpu_to_le32(clock); /* 10 khz */
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args.v3.ulClockParams = cpu_to_le32((clock_type << 24) | clock);
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atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
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@ -2726,8 +2725,7 @@ int radeon_atom_get_clock_dividers(struct radeon_device *rdev,
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dividers->vco_mode = (args.v3.ucCntlFlag &
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ATOM_PLL_CNTL_FLAG_MPLL_VCO_MODE) ? 1 : 0;
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} else {
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args.v5.ulClock.ulComputeClockFlag = clock_type;
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args.v5.ulClock.ulClockFreq = cpu_to_le32(clock); /* 10 khz */
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args.v5.ulClockParams = cpu_to_le32((clock_type << 24) | clock);
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if (strobe_mode)
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args.v5.ucInputFlag = ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN;
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