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https://github.com/FEX-Emu/linux.git
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Merge branch 'acpi-lpss'
* acpi-lpss:
ACPI / LPSS: override SDIO private register space size from ACPI tables
ACPI / LPSS: mask the UART TX completion interrupt
ACPI / LPSS: add support for Intel BayTrail
Conflicts:
drivers/acpi/acpi_lpss.c (with commit b9e95fc
)
This commit is contained in:
commit
f4c9f40238
@ -32,12 +32,26 @@ ACPI_MODULE_NAME("acpi_lpss");
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#define LPSS_GENERAL_LTR_MODE_SW BIT(2)
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#define LPSS_SW_LTR 0x10
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#define LPSS_AUTO_LTR 0x14
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#define LPSS_TX_INT 0x20
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#define LPSS_TX_INT_MASK BIT(1)
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struct lpss_shared_clock {
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const char *name;
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unsigned long rate;
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struct clk *clk;
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};
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struct lpss_private_data;
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struct lpss_device_desc {
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bool clk_required;
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const char *clkdev_name;
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bool ltr_required;
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unsigned int prv_offset;
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size_t prv_size_override;
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bool clk_gate;
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struct lpss_shared_clock *shared_clock;
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void (*setup)(struct lpss_private_data *pdata);
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};
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static struct lpss_device_desc lpss_dma_desc = {
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@ -52,17 +66,76 @@ struct lpss_private_data {
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const struct lpss_device_desc *dev_desc;
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};
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static void lpss_uart_setup(struct lpss_private_data *pdata)
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{
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unsigned int tx_int_offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
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u32 reg;
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reg = readl(pdata->mmio_base + tx_int_offset);
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writel(reg | LPSS_TX_INT_MASK, pdata->mmio_base + tx_int_offset);
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}
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static struct lpss_device_desc lpt_dev_desc = {
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.clk_required = true,
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.prv_offset = 0x800,
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.ltr_required = true,
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.clk_gate = true,
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};
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static struct lpss_device_desc lpt_uart_dev_desc = {
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.clk_required = true,
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.prv_offset = 0x800,
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.ltr_required = true,
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.clk_gate = true,
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.setup = lpss_uart_setup,
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};
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static struct lpss_device_desc lpt_sdio_dev_desc = {
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.prv_offset = 0x1000,
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.prv_size_override = 0x1018,
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.ltr_required = true,
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};
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static struct lpss_shared_clock uart_clock = {
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.name = "uart_clk",
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.rate = 44236800,
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};
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static struct lpss_device_desc byt_uart_dev_desc = {
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.clk_required = true,
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.prv_offset = 0x800,
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.clk_gate = true,
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.shared_clock = &uart_clock,
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.setup = lpss_uart_setup,
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};
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static struct lpss_shared_clock spi_clock = {
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.name = "spi_clk",
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.rate = 50000000,
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};
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static struct lpss_device_desc byt_spi_dev_desc = {
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.clk_required = true,
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.prv_offset = 0x400,
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.clk_gate = true,
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.shared_clock = &spi_clock,
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};
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static struct lpss_device_desc byt_sdio_dev_desc = {
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.clk_required = true,
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};
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static struct lpss_shared_clock i2c_clock = {
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.name = "i2c_clk",
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.rate = 100000000,
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};
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static struct lpss_device_desc byt_i2c_dev_desc = {
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.clk_required = true,
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.prv_offset = 0x800,
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.shared_clock = &i2c_clock,
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};
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static const struct acpi_device_id acpi_lpss_device_ids[] = {
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/* Generic LPSS devices */
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{ "INTL9C60", (unsigned long)&lpss_dma_desc },
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@ -72,11 +145,18 @@ static const struct acpi_device_id acpi_lpss_device_ids[] = {
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{ "INT33C1", (unsigned long)&lpt_dev_desc },
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{ "INT33C2", (unsigned long)&lpt_dev_desc },
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{ "INT33C3", (unsigned long)&lpt_dev_desc },
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{ "INT33C4", (unsigned long)&lpt_dev_desc },
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{ "INT33C5", (unsigned long)&lpt_dev_desc },
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{ "INT33C4", (unsigned long)&lpt_uart_dev_desc },
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{ "INT33C5", (unsigned long)&lpt_uart_dev_desc },
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{ "INT33C6", (unsigned long)&lpt_sdio_dev_desc },
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{ "INT33C7", },
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/* BayTrail LPSS devices */
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{ "80860F0A", (unsigned long)&byt_uart_dev_desc },
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{ "80860F0E", (unsigned long)&byt_spi_dev_desc },
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{ "80860F14", (unsigned long)&byt_sdio_dev_desc },
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{ "80860F41", (unsigned long)&byt_i2c_dev_desc },
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{ "INT33B2", },
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{ }
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};
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@ -98,7 +178,10 @@ static int register_device_clock(struct acpi_device *adev,
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struct lpss_private_data *pdata)
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{
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const struct lpss_device_desc *dev_desc = pdata->dev_desc;
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struct lpss_shared_clock *shared_clock = dev_desc->shared_clock;
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struct clk *clk = ERR_PTR(-ENODEV);
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struct lpss_clk_data *clk_data;
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const char *parent;
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if (!lpss_clk_dev)
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lpt_register_clock_device();
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@ -117,14 +200,30 @@ static int register_device_clock(struct acpi_device *adev,
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|| pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
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return -ENODATA;
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pdata->clk = clk_register_gate(NULL, dev_name(&adev->dev),
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clk_data->name, 0,
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pdata->mmio_base + dev_desc->prv_offset,
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0, 0, NULL);
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if (IS_ERR(pdata->clk))
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return PTR_ERR(pdata->clk);
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parent = clk_data->name;
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clk_register_clkdev(pdata->clk, NULL, dev_name(&adev->dev));
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if (shared_clock) {
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clk = shared_clock->clk;
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if (!clk) {
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clk = clk_register_fixed_rate(NULL, shared_clock->name,
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"lpss_clk", 0,
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shared_clock->rate);
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shared_clock->clk = clk;
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}
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parent = shared_clock->name;
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}
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if (dev_desc->clk_gate) {
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clk = clk_register_gate(NULL, dev_name(&adev->dev), parent, 0,
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pdata->mmio_base + dev_desc->prv_offset,
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0, 0, NULL);
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pdata->clk = clk;
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}
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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clk_register_clkdev(clk, NULL, dev_name(&adev->dev));
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return 0;
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}
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@ -152,7 +251,10 @@ static int acpi_lpss_create_device(struct acpi_device *adev,
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list_for_each_entry(rentry, &resource_list, node)
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if (resource_type(&rentry->res) == IORESOURCE_MEM) {
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pdata->mmio_size = resource_size(&rentry->res);
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if (dev_desc->prv_size_override)
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pdata->mmio_size = dev_desc->prv_size_override;
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else
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pdata->mmio_size = resource_size(&rentry->res);
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pdata->mmio_base = ioremap(rentry->res.start,
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pdata->mmio_size);
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pdata->dev_desc = dev_desc;
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@ -182,6 +284,9 @@ static int acpi_lpss_create_device(struct acpi_device *adev,
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goto err_out;
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}
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if (dev_desc->setup)
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dev_desc->setup(pdata);
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adev->driver_data = pdata;
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ret = acpi_create_platform_device(adev, id);
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if (ret > 0)
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@ -1,5 +1,5 @@
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/*
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* Intel Lynxpoint LPSS clocks.
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* Intel Low Power Subsystem clocks.
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*
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* Copyright (C) 2013, Intel Corporation
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* Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
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@ -18,8 +18,6 @@
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#include <linux/platform_data/clk-lpss.h>
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#include <linux/platform_device.h>
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#define PRV_CLOCK_PARAMS 0x800
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static int lpt_clk_probe(struct platform_device *pdev)
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{
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struct lpss_clk_data *drvdata;
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