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ARM: mvebu: Allow to power down L2 cache controller in idle mode
This commit adds a function which adjusts the PMSU configuration to automatically power down the L2 and coherency fabric when we enter a certain idle state. This feature is part of the Power Management Service Unit of the Armada 370 and Armada XP SoCs. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1397488214-20685-8-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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@ -33,8 +33,13 @@ static void __iomem *pmsu_mp_base;
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#define PMSU_BASE_OFFSET 0x100
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#define PMSU_REG_SIZE 0x1000
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/* PMSU MP registers */
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#define PMSU_BOOT_ADDR_REDIRECT_OFFSET(cpu) ((cpu * 0x100) + 0x124)
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/* PMSU fabric registers */
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#define L2C_NFABRIC_PM_CTL 0x4
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#define L2C_NFABRIC_PM_CTL_PWR_DOWN BIT(20)
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static struct of_device_id of_pmsu_table[] = {
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{ .compatible = "marvell,armada-370-pmsu", },
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{ .compatible = "marvell,armada-370-xp-pmsu", },
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@ -92,4 +97,17 @@ static int __init armada_370_xp_pmsu_init(void)
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return ret;
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}
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static void armada_370_xp_pmsu_enable_l2_powerdown_onidle(void)
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{
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u32 reg;
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if (pmsu_mp_base == NULL)
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return;
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/* Enable L2 & Fabric powerdown in Deep-Idle mode - Fabric */
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reg = readl(pmsu_mp_base + L2C_NFABRIC_PM_CTL);
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reg |= L2C_NFABRIC_PM_CTL_PWR_DOWN;
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writel(reg, pmsu_mp_base + L2C_NFABRIC_PM_CTL);
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}
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early_initcall(armada_370_xp_pmsu_init);
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