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pinctrl: mvebu: armada-38x: add ua1 functions
The latest version of the Armada 38x datasheet documents several new UART1 related functions on various MPP pins. This commit adds the description of these new functions to the Armada 38x pinctrl driver as well as to its DT binding documentation. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -60,8 +60,8 @@ mpp41 41 gpio, ua1(rxd), ge1(rxctl), ua0(cts), spi1(cs3), dev(burs
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mpp42 42 gpio, ua1(txd), ua0(rts), dev(ad7)
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mpp43 43 gpio, pcie0(clkreq), dram(vttctrl), dram(deccerr), spi1(cs2), dev(clkout), nand(rb1)
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mpp44 44 gpio, sata0(prsnt), sata1(prsnt), sata2(prsnt) [2], sata3(prsnt) [3]
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mpp45 45 gpio, ref(clk_out0), pcie0(rstout)
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mpp46 46 gpio, ref(clk_out1), pcie0(rstout)
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mpp45 45 gpio, ref(clk_out0), pcie0(rstout), ua1(rxd)
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mpp46 46 gpio, ref(clk_out1), pcie0(rstout), ua1(txd)
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mpp47 47 gpio, sata0(prsnt), sata1(prsnt), sata2(prsnt) [2], sata3(prsnt) [2]
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mpp48 48 gpio, sata0(prsnt), dram(vttctrl), tdm(pclk), audio(mclk), sd0(d4), pcie0(clkreq)
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mpp49 49 gpio, sata2(prsnt) [2], sata3(prsnt) [2], tdm(fsync), audio(lrclk), sd0(d5), pcie1(clkreq)
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@ -70,10 +70,10 @@ mpp51 51 gpio, tdm(dtx), audio(sdo), dram(deccerr)
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mpp52 52 gpio, pcie0(rstout), tdm(int), audio(sdi), sd0(d6)
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mpp53 53 gpio, sata1(prsnt), sata0(prsnt), tdm(rst), audio(bclk), sd0(d7)
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mpp54 54 gpio, sata0(prsnt), sata1(prsnt), pcie0(rstout), ge0(txerr), sd0(d3)
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mpp55 55 gpio, ua1(cts), ge(mdio), pcie1(clkreq) [1], spi1(cs1), sd0(d0)
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mpp56 56 gpio, ua1(rts), ge(mdc), dram(deccerr), spi1(mosi)
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mpp57 57 gpio, spi1(sck), sd0(clk)
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mpp58 58 gpio, pcie1(clkreq) [1], i2c1(sck), pcie2(clkreq), spi1(miso), sd0(d1)
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mpp55 55 gpio, ua1(cts), ge(mdio), pcie1(clkreq) [1], spi1(cs1), sd0(d0), ua1(rxd)
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mpp56 56 gpio, ua1(rts), ge(mdc), dram(deccerr), spi1(mosi), ua1(txd)
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mpp57 57 gpio, spi1(sck), sd0(clk), ua1(txd)
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mpp58 58 gpio, pcie1(clkreq) [1], i2c1(sck), pcie2(clkreq), spi1(miso), sd0(d1), ua1(rxd)
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mpp59 59 gpio, pcie0(rstout), i2c1(sda), spi1(cs0), sd0(d2)
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[1]: only available on 88F6820 and 88F6828
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@ -292,11 +292,13 @@ static struct mvebu_mpp_mode armada_38x_mpp_modes[] = {
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MPP_MODE(45,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
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MPP_VAR_FUNCTION(1, "ref", "clk_out0", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6810_PLUS)),
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MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6810_PLUS)),
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MPP_MODE(46,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
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MPP_VAR_FUNCTION(1, "ref", "clk_out1", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6810_PLUS)),
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MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6810_PLUS)),
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MPP_MODE(47,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
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MPP_VAR_FUNCTION(1, "sata0", "prsnt", V_88F6810_PLUS),
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@ -356,24 +358,28 @@ static struct mvebu_mpp_mode armada_38x_mpp_modes[] = {
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MPP_VAR_FUNCTION(2, "ge", "mdio", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(3, "pcie1", "clkreq", V_88F6820_PLUS),
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MPP_VAR_FUNCTION(4, "spi1", "cs1", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(5, "sd0", "d0", V_88F6810_PLUS)),
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MPP_VAR_FUNCTION(5, "sd0", "d0", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6810_PLUS)),
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MPP_MODE(56,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
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MPP_VAR_FUNCTION(1, "ua1", "rts", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(2, "ge", "mdc", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(3, "dram", "deccerr", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(4, "spi1", "mosi", V_88F6810_PLUS)),
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MPP_VAR_FUNCTION(4, "spi1", "mosi", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6810_PLUS)),
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MPP_MODE(57,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
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MPP_VAR_FUNCTION(4, "spi1", "sck", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(5, "sd0", "clk", V_88F6810_PLUS)),
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MPP_VAR_FUNCTION(5, "sd0", "clk", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6810_PLUS)),
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MPP_MODE(58,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
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MPP_VAR_FUNCTION(1, "pcie1", "clkreq", V_88F6820_PLUS),
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MPP_VAR_FUNCTION(2, "i2c1", "sck", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(3, "pcie2", "clkreq", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(4, "spi1", "miso", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(5, "sd0", "d1", V_88F6810_PLUS)),
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MPP_VAR_FUNCTION(5, "sd0", "d1", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6810_PLUS)),
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MPP_MODE(59,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
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MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6810_PLUS),
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