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Merge branch 'spi/merge' of git://git.secretlab.ca/git/linux-2.6
* 'spi/merge' of git://git.secretlab.ca/git/linux-2.6: spi-topcliff-pch: Fix overrun issue spi-topcliff-pch: Add recovery processing in case FIFO overrun error occurs spi-topcliff-pch: Fix CPU read complete condition issue spi-topcliff-pch: Fix SSN Control issue spi-topcliff-pch: add tx-memory clear after complete transmitting
This commit is contained in:
Linus Torvalds
commit
f8451c3f15
@ -50,6 +50,8 @@
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#define PCH_RX_THOLD 7
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#define PCH_RX_THOLD_MAX 15
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#define PCH_TX_THOLD 2
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#define PCH_MAX_BAUDRATE 5000000
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#define PCH_MAX_FIFO_DEPTH 16
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@ -58,6 +60,7 @@
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#define PCH_SLEEP_TIME 10
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#define SSN_LOW 0x02U
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#define SSN_HIGH 0x03U
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#define SSN_NO_CONTROL 0x00U
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#define PCH_MAX_CS 0xFF
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#define PCI_DEVICE_ID_GE_SPI 0x8816
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@ -316,16 +319,19 @@ static void pch_spi_handler_sub(struct pch_spi_data *data, u32 reg_spsr_val,
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/* if transfer complete interrupt */
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if (reg_spsr_val & SPSR_FI_BIT) {
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if (tx_index < bpw_len)
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if ((tx_index == bpw_len) && (rx_index == tx_index)) {
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/* disable interrupts */
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pch_spi_setclr_reg(data->master, PCH_SPCR, 0, PCH_ALL);
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/* transfer is completed;
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inform pch_spi_process_messages */
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data->transfer_complete = true;
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data->transfer_active = false;
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wake_up(&data->wait);
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} else {
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dev_err(&data->master->dev,
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"%s : Transfer is not completed", __func__);
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/* disable interrupts */
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pch_spi_setclr_reg(data->master, PCH_SPCR, 0, PCH_ALL);
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/* transfer is completed;inform pch_spi_process_messages */
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data->transfer_complete = true;
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data->transfer_active = false;
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wake_up(&data->wait);
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}
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}
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}
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@ -348,16 +354,26 @@ static irqreturn_t pch_spi_handler(int irq, void *dev_id)
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"%s returning due to suspend\n", __func__);
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return IRQ_NONE;
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}
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if (data->use_dma)
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return IRQ_NONE;
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io_remap_addr = data->io_remap_addr;
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spsr = io_remap_addr + PCH_SPSR;
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reg_spsr_val = ioread32(spsr);
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if (reg_spsr_val & SPSR_ORF_BIT)
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dev_err(&board_dat->pdev->dev, "%s Over run error", __func__);
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if (reg_spsr_val & SPSR_ORF_BIT) {
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dev_err(&board_dat->pdev->dev, "%s Over run error\n", __func__);
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if (data->current_msg->complete != 0) {
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data->transfer_complete = true;
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data->current_msg->status = -EIO;
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data->current_msg->complete(data->current_msg->context);
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data->bcurrent_msg_processing = false;
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data->current_msg = NULL;
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data->cur_trans = NULL;
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}
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}
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if (data->use_dma)
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return IRQ_NONE;
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/* Check if the interrupt is for SPI device */
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if (reg_spsr_val & (SPSR_FI_BIT | SPSR_RFI_BIT)) {
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@ -756,10 +772,6 @@ static void pch_spi_set_ir(struct pch_spi_data *data)
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wait_event_interruptible(data->wait, data->transfer_complete);
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pch_spi_writereg(data->master, PCH_SSNXCR, SSN_NO_CONTROL);
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dev_dbg(&data->master->dev,
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"%s:no more control over SSN-writing 0 to SSNXCR.", __func__);
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/* clear all interrupts */
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pch_spi_writereg(data->master, PCH_SPSR,
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pch_spi_readreg(data->master, PCH_SPSR));
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@ -815,10 +827,11 @@ static void pch_spi_copy_rx_data_for_dma(struct pch_spi_data *data, int bpw)
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}
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}
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static void pch_spi_start_transfer(struct pch_spi_data *data)
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static int pch_spi_start_transfer(struct pch_spi_data *data)
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{
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struct pch_spi_dma_ctrl *dma;
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unsigned long flags;
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int rtn;
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dma = &data->dma;
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@ -833,19 +846,23 @@ static void pch_spi_start_transfer(struct pch_spi_data *data)
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initiating the transfer. */
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dev_dbg(&data->master->dev,
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"%s:waiting for transfer to get over\n", __func__);
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wait_event_interruptible(data->wait, data->transfer_complete);
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rtn = wait_event_interruptible_timeout(data->wait,
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data->transfer_complete,
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msecs_to_jiffies(2 * HZ));
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dma_sync_sg_for_cpu(&data->master->dev, dma->sg_rx_p, dma->nent,
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DMA_FROM_DEVICE);
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dma_sync_sg_for_cpu(&data->master->dev, dma->sg_tx_p, dma->nent,
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DMA_FROM_DEVICE);
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memset(data->dma.tx_buf_virt, 0, PAGE_SIZE);
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async_tx_ack(dma->desc_rx);
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async_tx_ack(dma->desc_tx);
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kfree(dma->sg_tx_p);
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kfree(dma->sg_rx_p);
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spin_lock_irqsave(&data->lock, flags);
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pch_spi_writereg(data->master, PCH_SSNXCR, SSN_NO_CONTROL);
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dev_dbg(&data->master->dev,
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"%s:no more control over SSN-writing 0 to SSNXCR.", __func__);
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/* clear fifo threshold, disable interrupts, disable SPI transfer */
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pch_spi_setclr_reg(data->master, PCH_SPCR, 0,
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@ -858,6 +875,8 @@ static void pch_spi_start_transfer(struct pch_spi_data *data)
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pch_spi_clear_fifo(data->master);
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spin_unlock_irqrestore(&data->lock, flags);
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return rtn;
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}
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static void pch_dma_rx_complete(void *arg)
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@ -1023,8 +1042,7 @@ static void pch_spi_handle_dma(struct pch_spi_data *data, int *bpw)
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/* set receive fifo threshold and transmit fifo threshold */
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pch_spi_setclr_reg(data->master, PCH_SPCR,
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((size - 1) << SPCR_RFIC_FIELD) |
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((PCH_MAX_FIFO_DEPTH - PCH_DMA_TRANS_SIZE) <<
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SPCR_TFIC_FIELD),
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(PCH_TX_THOLD << SPCR_TFIC_FIELD),
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MASK_RFIC_SPCR_BITS | MASK_TFIC_SPCR_BITS);
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spin_unlock_irqrestore(&data->lock, flags);
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@ -1035,13 +1053,20 @@ static void pch_spi_handle_dma(struct pch_spi_data *data, int *bpw)
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/* offset, length setting */
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sg = dma->sg_rx_p;
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for (i = 0; i < num; i++, sg++) {
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if (i == 0) {
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sg->offset = 0;
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if (i == (num - 2)) {
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sg->offset = size * i;
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sg->offset = sg->offset * (*bpw / 8);
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sg_set_page(sg, virt_to_page(dma->rx_buf_virt), rem,
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sg->offset);
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sg_dma_len(sg) = rem;
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} else if (i == (num - 1)) {
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sg->offset = size * (i - 1) + rem;
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sg->offset = sg->offset * (*bpw / 8);
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sg_set_page(sg, virt_to_page(dma->rx_buf_virt), size,
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sg->offset);
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sg_dma_len(sg) = size;
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} else {
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sg->offset = rem + size * (i - 1);
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sg->offset = size * i;
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sg->offset = sg->offset * (*bpw / 8);
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sg_set_page(sg, virt_to_page(dma->rx_buf_virt), size,
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sg->offset);
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@ -1065,6 +1090,16 @@ static void pch_spi_handle_dma(struct pch_spi_data *data, int *bpw)
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dma->desc_rx = desc_rx;
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/* TX */
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if (data->bpw_len > PCH_DMA_TRANS_SIZE) {
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num = data->bpw_len / PCH_DMA_TRANS_SIZE;
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size = PCH_DMA_TRANS_SIZE;
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rem = 16;
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} else {
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num = 1;
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size = data->bpw_len;
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rem = data->bpw_len;
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}
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dma->sg_tx_p = kzalloc(sizeof(struct scatterlist)*num, GFP_ATOMIC);
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sg_init_table(dma->sg_tx_p, num); /* Initialize SG table */
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/* offset, length setting */
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@ -1162,6 +1197,7 @@ static void pch_spi_process_messages(struct work_struct *pwork)
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if (data->use_dma)
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pch_spi_request_dma(data,
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data->current_msg->spi->bits_per_word);
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pch_spi_writereg(data->master, PCH_SSNXCR, SSN_NO_CONTROL);
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do {
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/* If we are already processing a message get the next
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transfer structure from the message otherwise retrieve
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@ -1184,7 +1220,8 @@ static void pch_spi_process_messages(struct work_struct *pwork)
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if (data->use_dma) {
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pch_spi_handle_dma(data, &bpw);
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pch_spi_start_transfer(data);
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if (!pch_spi_start_transfer(data))
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goto out;
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pch_spi_copy_rx_data_for_dma(data, bpw);
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} else {
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pch_spi_set_tx(data, &bpw);
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@ -1222,6 +1259,8 @@ static void pch_spi_process_messages(struct work_struct *pwork)
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} while (data->cur_trans != NULL);
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out:
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pch_spi_writereg(data->master, PCH_SSNXCR, SSN_HIGH);
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if (data->use_dma)
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pch_spi_release_dma(data);
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}
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