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MIPS: add readl/write_be accessors
MIPS currently lacks the readl_be and writel_be accessors which are required by BCM63xx for OHCI and EHCI support. Let's define them globally for MIPS. This also fixes the compilation of the bcm63xx defconfig against USB. Signed-off-by: Florian Fainelli <ffainelli@freebox.fr> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Patchwork: http://patchwork.linux-mips.org/patch/793/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -447,6 +447,24 @@ __BUILDIO(q, u64)
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#define readl_relaxed readl
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#define readl_relaxed readl
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#define readq_relaxed readq
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#define readq_relaxed readq
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#define readb_be(addr) \
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__raw_readb((__force unsigned *)(addr))
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#define readw_be(addr) \
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be16_to_cpu(__raw_readw((__force unsigned *)(addr)))
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#define readl_be(addr) \
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be32_to_cpu(__raw_readl((__force unsigned *)(addr)))
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#define readq_be(addr) \
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be64_to_cpu(__raw_readq((__force unsigned *)(addr)))
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#define writeb_be(val, addr) \
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__raw_writeb((val), (__force unsigned *)(addr))
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#define writew_be(val, addr) \
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__raw_writew(cpu_to_be16((val)), (__force unsigned *)(addr))
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#define writel_be(val, addr) \
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__raw_writel(cpu_to_be32((val)), (__force unsigned *)(addr))
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#define writeq_be(val, addr) \
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__raw_writeq(cpu_to_be64((val)), (__force unsigned *)(addr))
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/*
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/*
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* Some code tests for these symbols
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* Some code tests for these symbols
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*/
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*/
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