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hwmon: (coretemp) Add Lynnfield CPU
Add Lynnfield processor support. Lynnfield is a quad-core Nehalem based microprocessor for Desktop market, which is introduced in September 2009. Signed-off-by: Huaxu Wan <huaxu.wan@linux.intel.com> Signed-off-by: Kent Liu <kent.liu@linux.intel.com> Acked-by: Rudolf Marek <r.marek@assembler.cz> Signed-off-by: Jean Delvare <khali@linux-fr.org>
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@ -6,7 +6,7 @@ Supported chips:
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Prefix: 'coretemp'
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Prefix: 'coretemp'
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CPUID: family 0x6, models 0xe (Pentium M DC), 0xf (Core 2 DC 65nm),
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CPUID: family 0x6, models 0xe (Pentium M DC), 0xf (Core 2 DC 65nm),
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0x16 (Core 2 SC 65nm), 0x17 (Penryn 45nm),
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0x16 (Core 2 SC 65nm), 0x17 (Penryn 45nm),
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0x1a (Nehalem), 0x1c (Atom).
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0x1a (Nehalem), 0x1c (Atom), 0x1e (Lynnfield)
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Datasheet: Intel 64 and IA-32 Architectures Software Developer's Manual
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Datasheet: Intel 64 and IA-32 Architectures Software Developer's Manual
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Volume 3A: System Programming Guide
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Volume 3A: System Programming Guide
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http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
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http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
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@ -442,11 +442,13 @@ static int __init coretemp_init(void)
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/* check if family 6, models 0xe (Pentium M DC),
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/* check if family 6, models 0xe (Pentium M DC),
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0xf (Core 2 DC 65nm), 0x16 (Core 2 SC 65nm),
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0xf (Core 2 DC 65nm), 0x16 (Core 2 SC 65nm),
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0x17 (Penryn 45nm), 0x1a (Nehalem), 0x1c (Atom) */
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0x17 (Penryn 45nm), 0x1a (Nehalem), 0x1c (Atom),
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0x1e (Lynnfield) */
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if ((c->cpuid_level < 0) || (c->x86 != 0x6) ||
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if ((c->cpuid_level < 0) || (c->x86 != 0x6) ||
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!((c->x86_model == 0xe) || (c->x86_model == 0xf) ||
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!((c->x86_model == 0xe) || (c->x86_model == 0xf) ||
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(c->x86_model == 0x16) || (c->x86_model == 0x17) ||
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(c->x86_model == 0x16) || (c->x86_model == 0x17) ||
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(c->x86_model == 0x1A) || (c->x86_model == 0x1c))) {
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(c->x86_model == 0x1a) || (c->x86_model == 0x1c) ||
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(c->x86_model == 0x1e))) {
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/* supported CPU not found, but report the unknown
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/* supported CPU not found, but report the unknown
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family 6 CPU */
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family 6 CPU */
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