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[Blackfin] arch: Fix gpio label handling
early serial init also utilizes the peripheral request api - however at this point bfin_gpio_init didn't allocate memory for the labels. So we always have two zombies (allocated pin functions without labels) This happens before the initcalls - We now allocate memory statically. Define MAX_RESOURCES individually for each cpu. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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@ -179,15 +179,13 @@ static struct gpio_port_t *gpio_array[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
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#endif
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#endif
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static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
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static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
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static unsigned short reserved_peri_map[gpio_bank(MAX_BLACKFIN_GPIOS + 16)];
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static unsigned short reserved_peri_map[gpio_bank(MAX_RESOURCES)];
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#define MAX_RESOURCES 256
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#define RESOURCE_LABEL_SIZE 16
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#define RESOURCE_LABEL_SIZE 16
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struct str_ident {
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static struct str_ident {
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char name[RESOURCE_LABEL_SIZE];
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char name[RESOURCE_LABEL_SIZE];
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} *str_ident;
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} str_ident[MAX_RESOURCES];
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#ifdef CONFIG_PM
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#ifdef CONFIG_PM
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static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
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static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
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@ -251,6 +249,11 @@ static char *get_label(unsigned short ident)
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static int cmp_label(unsigned short ident, const char *label)
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static int cmp_label(unsigned short ident, const char *label)
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{
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{
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if (label == NULL) {
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dump_stack();
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printk(KERN_ERR "Please provide none-null label\n");
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}
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if (label && str_ident)
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if (label && str_ident)
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return strncmp(str_ident[ident].name,
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return strncmp(str_ident[ident].name,
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label, strlen(label));
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label, strlen(label));
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@ -419,12 +422,6 @@ static void default_gpio(unsigned short gpio)
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static int __init bfin_gpio_init(void)
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static int __init bfin_gpio_init(void)
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{
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{
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str_ident = kcalloc(MAX_RESOURCES,
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sizeof(struct str_ident), GFP_KERNEL);
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if (str_ident == NULL)
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return -ENOMEM;
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memset(str_ident, 0, MAX_RESOURCES * sizeof(struct str_ident));
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printk(KERN_INFO "Blackfin GPIO Controller\n");
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printk(KERN_INFO "Blackfin GPIO Controller\n");
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@ -785,6 +782,14 @@ void gpio_pm_restore(void)
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}
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}
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#endif
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#endif
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#else /* BF548_FAMILY */
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unsigned short get_gpio_dir(unsigned short gpio)
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{
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return (0x01 & (gpio_array[gpio_bank(gpio)]->port_dir_clear >> gpio_sub_n(gpio)));
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}
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EXPORT_SYMBOL(get_gpio_dir);
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#endif /* BF548_FAMILY */
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#endif /* BF548_FAMILY */
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/***********************************************************
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/***********************************************************
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@ -1204,10 +1209,10 @@ static int gpio_proc_read(char *buf, char **start, off_t offset,
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for (c = 0; c < MAX_RESOURCES; c++) {
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for (c = 0; c < MAX_RESOURCES; c++) {
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if (!check_gpio(c) && (reserved_gpio_map[gpio_bank(c)] & gpio_bit(c)))
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if (!check_gpio(c) && (reserved_gpio_map[gpio_bank(c)] & gpio_bit(c)))
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len = sprintf(buf, "GPIO_%d: %s \tGPIO %s\n", c,
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len = sprintf(buf, "GPIO_%d: %s \t\tGPIO %s\n", c,
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get_label(c), get_gpio_dir(c) ? "OUTPUT" : "INPUT");
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get_label(c), get_gpio_dir(c) ? "OUTPUT" : "INPUT");
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else if (reserved_peri_map[gpio_bank(c)] & gpio_bit(c))
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else if (reserved_peri_map[gpio_bank(c)] & gpio_bit(c))
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len = sprintf(buf, "GPIO_%d: %s \tPeripheral\n", c, get_label(c));
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len = sprintf(buf, "GPIO_%d: %s \t\tPeripheral\n", c, get_label(c));
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else
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else
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continue;
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continue;
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buf += len;
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buf += len;
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@ -1,6 +1,8 @@
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#ifndef _MACH_PORTMUX_H_
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#ifndef _MACH_PORTMUX_H_
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#define _MACH_PORTMUX_H_
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#define _MACH_PORTMUX_H_
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#define MAX_RESOURCES MAX_BLACKFIN_GPIOS
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#define P_PPI0_D0 (P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(0))
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#define P_PPI0_D0 (P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(0))
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#define P_PPI0_D1 (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(0))
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#define P_PPI0_D1 (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(0))
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#define P_PPI0_D2 (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(0))
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#define P_PPI0_D2 (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(0))
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@ -1,6 +1,8 @@
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#ifndef _MACH_PORTMUX_H_
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#ifndef _MACH_PORTMUX_H_
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#define _MACH_PORTMUX_H_
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#define _MACH_PORTMUX_H_
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#define MAX_RESOURCES MAX_BLACKFIN_GPIOS
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#define P_PPI0_CLK (P_DONTCARE)
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#define P_PPI0_CLK (P_DONTCARE)
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#define P_PPI0_FS1 (P_DONTCARE)
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#define P_PPI0_FS1 (P_DONTCARE)
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#define P_PPI0_FS2 (P_DONTCARE)
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#define P_PPI0_FS2 (P_DONTCARE)
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@ -1,6 +1,8 @@
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#ifndef _MACH_PORTMUX_H_
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#ifndef _MACH_PORTMUX_H_
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#define _MACH_PORTMUX_H_
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#define _MACH_PORTMUX_H_
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#define MAX_RESOURCES (MAX_BLACKFIN_GPIOS + GPIO_BANKSIZE) /* We additionally handle PORTJ */
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#define P_UART0_TX (P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(0))
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#define P_UART0_TX (P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(0))
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#define P_UART0_RX (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(0))
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#define P_UART0_RX (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(0))
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#define P_UART1_TX (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(0))
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#define P_UART1_TX (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(0))
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@ -1,6 +1,8 @@
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#ifndef _MACH_PORTMUX_H_
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#ifndef _MACH_PORTMUX_H_
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#define _MACH_PORTMUX_H_
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#define _MACH_PORTMUX_H_
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#define MAX_RESOURCES MAX_BLACKFIN_GPIOS
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#define P_SPORT2_TFS (P_DEFINED | P_IDENT(GPIO_PA0) | P_FUNCT(0))
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#define P_SPORT2_TFS (P_DEFINED | P_IDENT(GPIO_PA0) | P_FUNCT(0))
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#define P_SPORT2_DTSEC (P_DEFINED | P_IDENT(GPIO_PA1) | P_FUNCT(0))
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#define P_SPORT2_DTSEC (P_DEFINED | P_IDENT(GPIO_PA1) | P_FUNCT(0))
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#define P_SPORT2_DTPRI (P_DEFINED | P_IDENT(GPIO_PA2) | P_FUNCT(0))
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#define P_SPORT2_DTPRI (P_DEFINED | P_IDENT(GPIO_PA2) | P_FUNCT(0))
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@ -1,6 +1,8 @@
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#ifndef _MACH_PORTMUX_H_
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#ifndef _MACH_PORTMUX_H_
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#define _MACH_PORTMUX_H_
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#define _MACH_PORTMUX_H_
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#define MAX_RESOURCES MAX_BLACKFIN_GPIOS
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#define P_PPI0_CLK (P_DONTCARE)
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#define P_PPI0_CLK (P_DONTCARE)
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#define P_PPI0_FS1 (P_DONTCARE)
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#define P_PPI0_FS1 (P_DONTCARE)
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#define P_PPI0_FS2 (P_DONTCARE)
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#define P_PPI0_FS2 (P_DONTCARE)
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