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powerpc/corenet: add support for the kmcent2 board
This board is built around Freescale's T1040 SoC. The peripherals used by this design are: - DDR3 RAM with SPD support - parallel NOR Flash as boot medium - 1 PCIe bus (PCIe1 x1) - 3 FMAN Ethernet devices (FMAN1 DTSEC1/2/5) - 4 IFC bus devices: - NOR flash - NAND flash - QRIO reset/power mgmt CPLD - BFTIC chassis management CPLD - 2 I2C buses - 1 SPI bus - HDLC bus with the QE's UCC1 - last but not least, the mandatory serial port The board can be used with the corenet32_smp_defconfig. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Scott Wood <oss@buserror.net>
This commit is contained in:
Valentin Longchamp
Scott Wood
parent
7b51f8e35e
commit
fdc8c4adb6
303
arch/powerpc/boot/dts/fsl/kmcent2.dts
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303
arch/powerpc/boot/dts/fsl/kmcent2.dts
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@ -0,0 +1,303 @@
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/*
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* Keymile kmcent2 Device Tree Source, based on T1040RDB DTS
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*
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* (C) Copyright 2016
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* Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
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*
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* Copyright 2014 - 2015 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/include/ "t104xsi-pre.dtsi"
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/ {
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model = "keymile,kmcent2";
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compatible = "keymile,kmcent2";
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aliases {
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front_phy = &front_phy;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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bman_fbpr: bman-fbpr {
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size = <0 0x1000000>;
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alignment = <0 0x1000000>;
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};
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qman_fqd: qman-fqd {
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size = <0 0x400000>;
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alignment = <0 0x400000>;
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};
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qman_pfdr: qman-pfdr {
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size = <0 0x2000000>;
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alignment = <0 0x2000000>;
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};
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};
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ifc: localbus@ffe124000 {
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reg = <0xf 0xfe124000 0 0x2000>;
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ranges = <0 0 0xf 0xe8000000 0x04000000
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1 0 0xf 0xfa000000 0x00010000
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2 0 0xf 0xfb000000 0x00010000
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4 0 0xf 0xc0000000 0x08000000
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6 0 0xf 0xd0000000 0x08000000
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7 0 0xf 0xd8000000 0x08000000>;
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nor@0,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x0 0x0 0x04000000>;
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bank-width = <2>;
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device-width = <2>;
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};
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nand@1,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,ifc-nand";
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reg = <0x1 0x0 0x10000>;
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};
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board-control@2,0 {
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compatible = "keymile,qriox";
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reg = <0x2 0x0 0x80>;
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};
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chassis-mgmt@6,0 {
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compatible = "keymile,bfticu";
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reg = <6 0 0x100>;
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interrupt-controller;
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interrupt-parent = <&mpic>;
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interrupts = <11 1 0 0>;
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#interrupt-cells = <1>;
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};
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};
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memory {
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device_type = "memory";
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};
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dcsr: dcsr@f00000000 {
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ranges = <0x00000000 0xf 0x00000000 0x01072000>;
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};
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bportals: bman-portals@ff4000000 {
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ranges = <0x0 0xf 0xf4000000 0x2000000>;
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};
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qportals: qman-portals@ff6000000 {
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ranges = <0x0 0xf 0xf6000000 0x2000000>;
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};
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soc: soc@ffe000000 {
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ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
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reg = <0xf 0xfe000000 0 0x00001000>;
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spi@110000 {
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network-clock@1 {
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compatible = "zarlink,zl30364";
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reg = <1>;
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spi-max-frequency = <1000000>;
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};
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};
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sdhc@114000 {
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status = "disabled";
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};
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i2c@118000 {
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clock-frequency = <100000>;
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mux@70 {
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compatible = "nxp,pca9547";
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reg = <0x70>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c-mux-idle-disconnect;
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i2c@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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eeprom@54 {
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compatible = "24c02";
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reg = <0x54>;
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pagesize = <2>;
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read-only;
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label = "ddr3-spd";
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};
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};
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i2c@7 {
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reg = <7>;
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#address-cells = <1>;
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#size-cells = <0>;
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temp-sensor@48 {
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compatible = "national,lm75";
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reg = <0x48>;
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label = "SENSOR_0";
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};
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temp-sensor@4a {
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compatible = "national,lm75";
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reg = <0x4a>;
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label = "SENSOR_2";
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};
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temp-sensor@4b {
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compatible = "national,lm75";
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reg = <0x4b>;
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label = "SENSOR_3";
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};
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};
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};
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};
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i2c@118100 {
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clock-frequency = <100000>;
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eeprom@50 {
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compatible = "atmel,24c08";
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reg = <0x50>;
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pagesize = <16>;
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};
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eeprom@54 {
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compatible = "atmel,24c08";
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reg = <0x54>;
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pagesize = <16>;
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};
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};
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i2c@119000 {
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status = "disabled";
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};
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i2c@119100 {
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status = "disabled";
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};
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serial2: serial@11d500 {
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status = "disabled";
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};
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serial3: serial@11d600 {
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status = "disabled";
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};
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usb0: usb@210000 {
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status = "disabled";
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};
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usb1: usb@211000 {
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status = "disabled";
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};
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display@180000 {
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status = "disabled";
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};
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sata@220000 {
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status = "disabled";
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};
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sata@221000 {
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status = "disabled";
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};
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fman@400000 {
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ethernet@e0000 {
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fixed-link = <0 1 1000 0 0>;
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phy-connection-type = "sgmii";
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};
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ethernet@e2000 {
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fixed-link = <1 1 1000 0 0>;
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phy-connection-type = "sgmii";
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};
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ethernet@e4000 {
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status = "disabled";
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};
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ethernet@e6000 {
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status = "disabled";
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};
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ethernet@e8000 {
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phy-handle = <&front_phy>;
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phy-connection-type = "rgmii";
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};
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mdio0: mdio@fc000 {
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front_phy: ethernet-phy@11 {
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reg = <0x11>;
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};
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};
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};
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};
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pci0: pcie@ffe240000 {
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reg = <0xf 0xfe240000 0 0x10000>;
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ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
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0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
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pcie@0 {
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ranges = <0x02000000 0 0xe0000000
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0x02000000 0 0xe0000000
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0 0x20000000
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0x01000000 0 0x00000000
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0x01000000 0 0x00000000
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0 0x00010000>;
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};
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};
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pci1: pcie@ffe250000 {
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status = "disabled";
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};
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pci2: pcie@ffe260000 {
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status = "disabled";
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};
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pci3: pcie@ffe270000 {
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status = "disabled";
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};
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qe: qe@ffe140000 {
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ranges = <0x0 0xf 0xfe140000 0x40000>;
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reg = <0xf 0xfe140000 0 0x480>;
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brg-frequency = <0>;
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bus-frequency = <0>;
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si1: si@700 {
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compatible = "fsl,t1040-qe-si";
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reg = <0x700 0x80>;
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};
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siram1: siram@1000 {
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compatible = "fsl,t1040-qe-siram";
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reg = <0x1000 0x800>;
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};
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ucc_hdlc: ucc@2000 {
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device_type = "hdlc";
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compatible = "fsl,ucc-hdlc";
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rx-clock-name = "clk9";
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tx-clock-name = "clk9";
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fsl,tx-timeslot-mask = <0xfffffffe>;
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fsl,rx-timeslot-mask = <0xfffffffe>;
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fsl,siram-entry-id = <0>;
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};
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};
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};
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#include "t1040si-post.dtsi"
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@ -157,6 +157,7 @@ static const char * const boards[] __initconst = {
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"fsl,T1040RDB",
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"fsl,T1042RDB",
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"fsl,T1042RDB_PI",
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"keymile,kmcent2",
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"keymile,kmcoge4",
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"varisys,CYRUS",
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NULL
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