mirror of
https://github.com/FEX-Emu/linux.git
synced 2025-01-11 03:48:00 +00:00
x86/mce: Make usable address checks Intel-only
The MCi_MISC bitfield definitions mce_usable_address() checks are Intel-only. Make them so. While at it, move mce_usable_address() up, before all its callers and get rid of the forward declaration. Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Tony Luck <tony.luck@intel.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1448350880-5573-5-git-send-email-bp@alien8.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
parent
db548a28fc
commit
feab21f835
@ -114,7 +114,6 @@ static struct work_struct mce_work;
|
||||
static struct irq_work mce_irq_work;
|
||||
|
||||
static void (*quirk_no_way_out)(int bank, struct mce *m, struct pt_regs *regs);
|
||||
static int mce_usable_address(struct mce *m);
|
||||
|
||||
/*
|
||||
* CPU/chipset specific EDAC code can register a notifier call here to print
|
||||
@ -475,6 +474,28 @@ static void mce_report_event(struct pt_regs *regs)
|
||||
irq_work_queue(&mce_irq_work);
|
||||
}
|
||||
|
||||
/*
|
||||
* Check if the address reported by the CPU is in a format we can parse.
|
||||
* It would be possible to add code for most other cases, but all would
|
||||
* be somewhat complicated (e.g. segment offset would require an instruction
|
||||
* parser). So only support physical addresses up to page granuality for now.
|
||||
*/
|
||||
static int mce_usable_address(struct mce *m)
|
||||
{
|
||||
if (!(m->status & MCI_STATUS_MISCV) || !(m->status & MCI_STATUS_ADDRV))
|
||||
return 0;
|
||||
|
||||
/* Checks after this one are Intel-specific: */
|
||||
if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
|
||||
return 1;
|
||||
|
||||
if (MCI_MISC_ADDR_LSB(m->misc) > PAGE_SHIFT)
|
||||
return 0;
|
||||
if (MCI_MISC_ADDR_MODE(m->misc) != MCI_MISC_ADDR_PHYS)
|
||||
return 0;
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int srao_decode_notifier(struct notifier_block *nb, unsigned long val,
|
||||
void *data)
|
||||
{
|
||||
@ -930,23 +951,6 @@ reset:
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* Check if the address reported by the CPU is in a format we can parse.
|
||||
* It would be possible to add code for most other cases, but all would
|
||||
* be somewhat complicated (e.g. segment offset would require an instruction
|
||||
* parser). So only support physical addresses up to page granuality for now.
|
||||
*/
|
||||
static int mce_usable_address(struct mce *m)
|
||||
{
|
||||
if (!(m->status & MCI_STATUS_MISCV) || !(m->status & MCI_STATUS_ADDRV))
|
||||
return 0;
|
||||
if (MCI_MISC_ADDR_LSB(m->misc) > PAGE_SHIFT)
|
||||
return 0;
|
||||
if (MCI_MISC_ADDR_MODE(m->misc) != MCI_MISC_ADDR_PHYS)
|
||||
return 0;
|
||||
return 1;
|
||||
}
|
||||
|
||||
static void mce_clear_state(unsigned long *toclear)
|
||||
{
|
||||
int i;
|
||||
|
Loading…
x
Reference in New Issue
Block a user