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drm/radeon/dpm: add pre/post_set_power_state callback (cayman)

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This properly implemented dynamic state adjustment by
using a working copy of the requested and current
power states.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2013-01-16 14:35:39 -05:00
parent e8a9539fa0
commit fee3d744bf
4 changed files with 60 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

65
drivers/gpu/drm/radeon/ni_dpm.c
View File

@ -791,7 +791,6 @@ static void ni_calculate_leakage_for_v_and_t(struct radeon_device *rdev,
static void ni_apply_state_adjust_rules(struct radeon_device *rdev,
struct radeon_ps *rps)
{
struct ni_power_info *ni_pi = ni_get_pi(rdev);
struct ni_ps *ps = ni_get_ps(rps);
struct radeon_clock_and_voltage_limits *max_limits;
bool disable_mclk_switching;
@ -799,11 +798,6 @@ static void ni_apply_state_adjust_rules(struct radeon_device *rdev,
u16 vddc, vddci;
int i;
/* point to the hw copy since this function will modify the ps */
ni_pi->hw_ps = *ps;
rdev->pm.dpm.hw_ps.ps_priv = &ni_pi->hw_ps;
ps = &ni_pi->hw_ps;
if (rdev->pm.dpm.new_active_crtc_count > 1)
disable_mclk_switching = true;
else
@ -3516,6 +3510,30 @@ void ni_dpm_setup_asic(struct radeon_device *rdev)
rv770_enable_acpi_pm(rdev);
}
static void ni_update_current_ps(struct radeon_device *rdev,
struct radeon_ps *rps)
{
struct ni_ps *new_ps = ni_get_ps(rps);
struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
struct ni_power_info *ni_pi = ni_get_pi(rdev);
eg_pi->current_rps = *rps;
ni_pi->current_ps = *new_ps;
eg_pi->current_rps.ps_priv = &ni_pi->current_ps;
}
static void ni_update_requested_ps(struct radeon_device *rdev,
struct radeon_ps *rps)
{
struct ni_ps *new_ps = ni_get_ps(rps);
struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
struct ni_power_info *ni_pi = ni_get_pi(rdev);
eg_pi->requested_rps = *rps;
ni_pi->requested_ps = *new_ps;
eg_pi->requested_rps.ps_priv = &ni_pi->requested_ps;
}
int ni_dpm_enable(struct radeon_device *rdev)
{
struct rv7xx_power_info *pi = rv770_get_pi(rdev);
@ -3590,6 +3608,8 @@ int ni_dpm_enable(struct radeon_device *rdev)
rv770_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, true);
ni_update_current_ps(rdev, boot_ps);
return 0;
}
@ -3627,6 +3647,8 @@ void ni_dpm_disable(struct radeon_device *rdev)
btc_reset_to_default(rdev);
ni_stop_smc(rdev);
ni_force_switch_to_arb_f0(rdev);
ni_update_current_ps(rdev, boot_ps);
}
int ni_power_control_set_level(struct radeon_device *rdev)
@ -3642,14 +3664,25 @@ int ni_power_control_set_level(struct radeon_device *rdev)
return 0;
}
int ni_dpm_pre_set_power_state(struct radeon_device *rdev)
{
struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps;
struct radeon_ps *new_ps = &requested_ps;
ni_update_requested_ps(rdev, new_ps);
ni_apply_state_adjust_rules(rdev, &eg_pi->requested_rps);
return 0;
}
int ni_dpm_set_power_state(struct radeon_device *rdev)
{
struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps;
struct radeon_ps *new_ps = &eg_pi->requested_rps;
int ret;
ni_apply_state_adjust_rules(rdev, new_ps);
ni_restrict_performance_levels_before_switch(rdev);
ni_enable_power_containment(rdev, new_ps, false);
ni_enable_smc_cac(rdev, new_ps, false);
@ -3676,6 +3709,14 @@ int ni_dpm_set_power_state(struct radeon_device *rdev)
return 0;
}
void ni_dpm_post_set_power_state(struct radeon_device *rdev)
{
struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
struct radeon_ps *new_ps = &eg_pi->requested_rps;
ni_update_current_ps(rdev, new_ps);
}
void ni_dpm_reset_asic(struct radeon_device *rdev)
{
ni_restrict_performance_levels_before_switch(rdev);
@ -4097,7 +4138,8 @@ void ni_dpm_print_power_state(struct radeon_device *rdev,
u32 ni_dpm_get_sclk(struct radeon_device *rdev, bool low)
{
struct ni_ps *requested_state = ni_get_ps(rdev->pm.dpm.requested_ps);
struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
struct ni_ps *requested_state = ni_get_ps(&eg_pi->requested_rps);
if (low)
return requested_state->performance_levels[0].sclk;
@ -4107,7 +4149,8 @@ u32 ni_dpm_get_sclk(struct radeon_device *rdev, bool low)
u32 ni_dpm_get_mclk(struct radeon_device *rdev, bool low)
{
struct ni_ps *requested_state = ni_get_ps(rdev->pm.dpm.requested_ps);
struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
struct ni_ps *requested_state = ni_get_ps(&eg_pi->requested_rps);
if (low)
return requested_state->performance_levels[0].mclk;

3
drivers/gpu/drm/radeon/ni_dpm.h
View File

@ -202,7 +202,8 @@ struct ni_power_info {
const struct ni_cac_weights *cac_weights;
u8 lta_window_size;
u8 lts_truncate;
struct ni_ps hw_ps;
struct ni_ps current_ps;
struct ni_ps requested_ps;
/* scratch structs */
SMC_NIslands_MCRegisters smc_mc_reg_table;
NISLANDS_SMC_STATETABLE smc_statetable;

2
drivers/gpu/drm/radeon/radeon_asic.c
View File

@ -1923,7 +1923,9 @@ static struct radeon_asic cayman_asic = {
.setup_asic = &ni_dpm_setup_asic,
.enable = &ni_dpm_enable,
.disable = &ni_dpm_disable,
.pre_set_power_state = &ni_dpm_pre_set_power_state,
.set_power_state = &ni_dpm_set_power_state,
.post_set_power_state = &ni_dpm_post_set_power_state,
.display_configuration_changed = &cypress_dpm_display_configuration_changed,
.fini = &ni_dpm_fini,
.get_sclk = &ni_dpm_get_sclk,

2
drivers/gpu/drm/radeon/radeon_asic.h
View File

@ -599,7 +599,9 @@ int ni_dpm_init(struct radeon_device *rdev);
void ni_dpm_setup_asic(struct radeon_device *rdev);
int ni_dpm_enable(struct radeon_device *rdev);
void ni_dpm_disable(struct radeon_device *rdev);
int ni_dpm_pre_set_power_state(struct radeon_device *rdev);
int ni_dpm_set_power_state(struct radeon_device *rdev);
void ni_dpm_post_set_power_state(struct radeon_device *rdev);
void ni_dpm_fini(struct radeon_device *rdev);
u32 ni_dpm_get_sclk(struct radeon_device *rdev, bool low);
u32 ni_dpm_get_mclk(struct radeon_device *rdev, bool low);