Commit Graph

10 Commits

Author SHA1 Message Date
Magnus Damm
e74a9625f8 ARM: mach-shmobile: Run-time IRQ handler for GIC
Break-out GIC specific IRQ demux code from the file
entry-macro-intc.S and register during run-time.

Covers sh73a0.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-01-07 10:42:56 +09:00
Takashi YOSHII
6bf45a1018 ARM: mach-shmobile: Add eMMC support through MMCIF on AG5EVM
Adding platform resources, PFC setting and release
reset pin for eMMC on ag5evm.

[damm@opensource.se: Add MSTP code for MMCIF]
Signed-off-by: Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-12-22 16:36:33 +09:00
Takashi YOSHII
5d7814728d ARM: mach-shmobile: Use pullups for AG5EVM KEYSC pins
Follow up to pfc-sh73a0.c's pull-up support.
Change GPIO_FN_KEYINx to GPIO_FN_KEYINx_PU.

Signed-off-by: Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-12-22 16:35:54 +09:00
Magnus Damm
5f53a56af5 ARM: mach-shmobile: sh73a0 INTCS support
Add INTCS support for the sh73a0 processor.

The interrupts on the sh73a0 processor are managed
through controllers such as GIC, INTCS and INTCA.

The ARM cores use the GIC as primary interrupt
controller and the INTCS and INTCA are hanging off
the GIC as cascaded interrupt controllers.

Peripherals connected both to the GIC and the INTC
controllers should if possible only use the GIC.

If no GIC connection is available then INTCS and
INTCA may be used instead.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-12-22 13:46:12 +09:00
Kuninori Morimoto
208c7dc272 ARM: mach-shmobile: ag5evm: Add FSI resources
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-11-29 13:01:08 +09:00
Kuninori Morimoto
aae0f73604 ARM: mach-shmobile: ag5evm: remove unused define
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-11-24 14:54:51 +09:00
Yoshii Takashi
8e67b22a13 ARM: mach-shmobile: ag5evm i2c_shmobile support.
Just add port multiplex settings to enable i2c modules.

Signed-off-by: Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-11-24 14:54:46 +09:00
Yoshii Takashi
2d22d48660 ARM: mach-shmobile: ag5evm: scan keyboard support
This consists of platform device resources/data for the board, and
simple clvdev entry for MSTP bit for keysc module.

This support only 49 of 80 key-switches on the board.

Signed-off-by: Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-11-24 14:54:34 +09:00
Takashi YOSHII
3256c78988 ARM: mach-shmobile: ag5evm: use gpio.
Ag5evm board now uses gpio api to initialize pins and peripherals.

Signed-off-by: Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-11-19 16:49:38 +09:00
Magnus Damm
6d9598e24d ARM: mach-shmobile: Initial AG5 and AG5EVM support
This patch adds initial support for Renesas SH-Mobile AG5.

At this point the AG5 CPU support is limited to the ARM
core, SCIF serial and a CMT timer together with L2 cache
and the GIC. The AG5EVM board also supports Ethernet.

Future patches will add support for GPIO, INTCS, CPGA
and platform data / driver updates for devices such as
IIC, LCDC, FSI, KEYSC, CEU and SDHI among others.

The code in entry-macro.S will be cleaned up when the
ARM IRQ demux code improvements have been merged.

Depends on the AG5EVM mach-type recently registered but
not yet present in arch/arm/tools/mach-types.

As the AG5EVM board comes with 512MiB memory it is
recommended to turn on HIGHMEM.

Many thanks to Yoshii-san for initial bring up.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-11-18 15:45:21 +09:00