13562 Commits

Author SHA1 Message Date
Thomas Gleixner
ce4ed256b8 arm: vt8500: Use proper irq accessors
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:47:55 +02:00
Thomas Gleixner
70c4fa2265 arm: msm: Use proper irq accessor functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:47:54 +02:00
Thomas Gleixner
8c04a1769f arm: plat-omap: Cleanup irq_desc access
1) Core code stores the flow type already
2) Flow type is accessible in irq_data

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:47:54 +02:00
Thomas Gleixner
d1118f68b6 arm: nomadik: Use local irq state
Store the enabled mask in the local state, so there is no need to
fiddle in the irq descriptor.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:47:54 +02:00
Thomas Gleixner
e0fc5b3226 arm: stmp3xxx: Use generic_handle_irq()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:47:54 +02:00
Thomas Gleixner
7222f3912f arm: plat-samsung: Use proper irq accessor functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:47:53 +02:00
Thomas Gleixner
e83bbb115e arm: Cleanup irq_desc access
Use the proper wrappers and use the flow type in irq_data.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:47:53 +02:00
Thomas Gleixner
cf8d1581c4 arm: msm: Convert to new irq chip functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:47:53 +02:00
Thomas Gleixner
1b7a2d90c8 arm: Use irq flag setter function
Use the proper accessor function instead of fiddling in the status
bits directly.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-arm-kernel@lists.infradead.org
2011-03-29 14:47:52 +02:00
Thomas Gleixner
1475b85d08 arm: Use genirq lockdep helper to set lock class
Remove the open coded access to irq_desc which will fail on sparse irq
and use the proper wrappers.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:47:52 +02:00
Thomas Gleixner
b0f18edaf6 arm: tegra: Remove unused bogus irq enable/disable magic
The core code handles thees already.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Colin Cross <ccross@android.com>
Cc: linux-tegra@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
2011-03-29 14:47:52 +02:00
Thomas Gleixner
1738209a15 arm: h720x: Fix irq conversion fallout
The conversion missed, that one of the irq functions is called from
the init code. Split it out, so the irq number based call works.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:47:52 +02:00
Thomas Gleixner
4fe25e3898 arm: nomadik: Remove non existing cpu id check
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:47:51 +02:00
Thomas Gleixner
504f1dfecc arm: ns9xxx: Remove non exisiting machine checks
The machine id cleanup missed to remove the checks for now removed
ids.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:47:51 +02:00
Thomas Gleixner
a40bd62153 arm: dove: Use correct GPIO_BASE and remove orion_gpio_init() leftover
commit 9eac6d0 (ARM: Remove dependency of plat-orion GPIO code on mach
directory includes) missed to convert one instance of
DOVE_GPIO_VIRT_BASE and left the orion_gpio_init() in mpp.c

Fix it up.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:47:51 +02:00
Thomas Gleixner
a68e5e0b9f arm: at91: at572d940hf: Fix SDRAMC define
That wants to be AT91_SDRAMC0

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:47:50 +02:00
Thomas Gleixner
f2e0bf2181 arm: footbridge: Make cksrc_dc21285_disable() void
This clocksource function needs to be void.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:47:50 +02:00
Thomas Gleixner
11f2cde116 arm: bios32: Remove non exisiting machine code
The id removal left this machine check in which breaks the build on
some platforms. Remove it.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:47:50 +02:00
Andres Salomon
b5b4bc32b6 ARM: mx51_efika: fix build error due to new mfd changes
MFD changes in 4ec1b54c ('mfd: mfd_cell is now implicitly available to
mc13xxx drivers') changed the mc13xxx_platform_data struct layout.

At the time all users were changed, but this driver was introduced in
another tree at the same time.  This updates the mc13xxx_platform_data
user, fixing a build error.

Signed-off-by: Andres Salomon <dilinger@queued.net>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-03-28 17:51:17 -07:00
Linus Torvalds
e5217fb8ae Merge branches 'irq-cleanup-for-linus' and 'irq-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'irq-cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  vlynq: Convert irq functions

* 'irq-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  genirq; Fix cleanup fallout
  genirq: Fix typo and remove unused variable
  genirq: Fix new kernel-doc warnings
  genirq: Add setter for AFFINITY_SET in irq_data state
  genirq: Provide setter inline for IRQD_IRQ_INPROGRESS
  genirq: Remove handle_IRQ_event
  arm: Ns9xxx: Remove private irq flow handler
  powerpc: cell: Use the core flow handler
  genirq: Provide edge_eoi flow handler
  genirq: Move INPROGRESS, MASKED and DISABLED state flags to irq_data
  genirq: Split irq_set_affinity() so it can be called with lock held.
  genirq: Add chip flag for restricting cpu_on/offline calls
  genirq: Add chip hooks for taking CPUs on/off line.
  genirq: Add irq disabled flag to irq_data state
  genirq: Reserve the irq when calling irq_set_chip()
2011-03-28 17:39:54 -07:00
Linus Torvalds
bc5bbc4541 Merge branch 'for-torvalds' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson
* 'for-torvalds' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  mach-ux500: configure board for the TPS61052 regulator v2
  mach-ux500: provide ab8500 init vector
  mach-ux500: board support for AB8500 GPIO driver
  gpio: driver for 42 AB8500 GPIO pins
2011-03-28 15:14:45 -07:00
Stephen Boyd
dfad549d98 ARM: 6826/1: Merge v6 and v7 DEBUG_LL DCC support
The inline assembly differences for v6 vs. v7 are purely
optimizations. On a v7 processor, an mrc with the pc sets the
condition codes to the 28-31 bits of the register being read. It
just so happens that the TX/RX full bits the DCC support code is
testing for are high enough in the register to be put into the
condition codes. On a v6 processor, this "feature" isn't
implemented and thus we have to do the usual read, mask, test
operations to check for TX/RX full. Thus, we can drop the v7
implementation and just use the v6 implementation for both.

Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-03-28 19:01:43 +01:00
Ming Lei
8e8806990c ARM: 6838/1: etm: fix section mismatch warning
The patch fixes the warning below:

WARNING: arch/arm/kernel/built-in.o(.data+0x27c): Section mismatch in reference from the variable etb_driver to the function .init.text:etb_probe()
The variable etb_driver references
the function __init etb_probe()
If the reference is valid then annotate the
variable with __init* or __refdata (see linux/init.h) or name the variable:
*_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console,

WARNING: arch/arm/kernel/built-in.o(.data+0x2cc): Section mismatch in reference from the variable etm_driver to the function .init.text:etm_probe()
The variable etm_driver references
the function __init etm_probe()
If the reference is valid then annotate the
variable with __init* or __refdata (see linux/init.h) or name the variable:
*_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console,

Signed-off-by: Ming Lei <tom.leiming@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-03-28 19:01:17 +01:00
Colin Cross
7f479c64a5 ARM: 6837/1: remove unused pci_fixup_prpmc1100
The PrPMC1100 machine was removed in 2.6.11, but left a reference to machine_is_prpmc1100 in arch/arm/kernel/bios32.c.  6f82f4db80189281a8ac42f2e72396accb719b57 removed the machine type, which causes a build failure:

CC      arch/arm/kernel/bios32.o
arch/arm/kernel/bios32.c: In function 'pci_fixup_prpmc1100':
arch/arm/kernel/bios32.c:174: error: implicit declaration of function 'machine_is_prpmc1100'

Remove the unused pci_fixup_prpcm1100.

Signed-off-by: Colin Cross <ccross@android.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-03-28 19:01:17 +01:00
Viktor Rosendahl
0652f06736 ARM: 6836/1: kprobes/fix emulation of LDR/STR instruction when Rn == PC
The Rn value from the emulation is unconditionally written back;
this is fine as long as Rn != PC because in that case, even if the
instruction isn't a write back instruction, it will only result in the
same value being written back.

In case Rn == PC, then the emulated instruction doesn't have the
actual PC value in Rn but an adjusted value; when this is written
back, it will result in the PC being incorrectly updated.

An altenative solution would be to check bits 24 and 22 to see whether
the instruction actually is a write back instruction or not. I think
it's enough to check whether Rn != PC,  because:
- it's looks cheaper than the alternative
- to my understaning it's not permitted to update the PC with a write
back instruction, so we don't lose any ability to emulate legal
instructions.
- in case of writing back for non write back instructions where Rn != PC, it doesn't matter because the values are the same.

Regarding the second point above, it would possibly be prudent to add
some checking to prep_emulate_ldr_str(), so that instructions with
both write back and Rn == PC would be rejected.

Signed-off-by: Viktor Rosendahl <viktor.rosendahl@nokia.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-03-28 19:01:16 +01:00
Russell King
255bae73b2 Merge git://git.kernel.org/pub/scm/linux/kernel/git/nico/orion into fixes 2011-03-28 18:57:19 +01:00
Russell King
5f183860d5 Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6 into devel-stable 2011-03-28 18:52:44 +01:00
Thomas Gleixner
6829310548 arm: Ns9xxx: Remove private irq flow handler
handle_prio_irq is almost identical with handle_fasteoi_irq. The
subtle differences are

1) The handler checks for IRQ_DISABLED after the device handler has
   been called. In case it's set it masks the interrupt.

2) When the handler sees IRQ_DISABLED on entry it masks the interupt
   in the same way as handle_fastoei_irq, but does not set the
   IRQ_PENDING flag.

3) Instead of gracefully handling a recursive interrupt it crashes the
   kernel.

#1 is just relevant when a device handler calls disable_irq_nosync()
   and it does not matter whether we mask the interrupt right away or
   not. We handle lazy masking for disable_irq anyway, so there is no
   real reason to have this extra mask in place.

#2 will prevent the resend of a pending interrupt, which can result in
   lost interrupts for edge type interrupts. For level type interrupts
   the resend is a noop in the generic code. According to the
   datasheet all interrupts are level type, so marking them as such
   will result in the exact same behaviour as the private
   handle_prio_irq implementation.

#3 is just stupid. Crashing the kernel instead of handling a problem
   gracefully is just wrong. With the current semantics- all handlers
   run with interrupts disabled - this is even more wrong.

Rename ack to eoi, remove the unused mask_ack, switch to
handle_fasteoi_irq and remove the private function.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Acked-by: Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
Cc: linux-arm-kernel@lists.infradead.org
LKML-Reference: <20110202212552.299898447@linutronix.de>
2011-03-28 16:55:11 +02:00
Kukjin Kim
3e1d9874b4 ARM: Suspend: Fix dependency of ARCH_SUSPEND_POSSIBLE
The current mainline codes of ARCH_S5P64X0 and ARCH_S5P6442
can not support suspend to ram. So needs this for preventing
build error on them.

Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Cc: Len Brown <len.brown@intel.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-03-28 16:17:54 +09:00
Kukjin Kim
9d5fda6656 ARM: SAMSUNG: Fix CPU idmask
This patch fixes CPU idmask of S5P64X0 and EXYNOS4210
and its comparison method because just want to use CPU
id for it.

Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-03-28 16:17:54 +09:00
Thomas Abraham
b9ab19f936 ARM: EXYNOS4: Fix addruart macro
Fix incorrect conditional execution of ldr instructions in
addruart macro.

Signed-off-by: Thomas Abraham <thomas.abraham@samsung.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-03-28 16:17:54 +09:00
Jeongtae Park
1af3c67212 ARM: EXYNOS4: Fix smsc9215 irq polarity on SMDKC210
This patch fixes smsc9215 irq ploarity configuration of SMDKC210.
We can change type of EINT(5) as HIGH, but it's better to change
IRQ output of smsc9215 as an active low because smsc's IRQ line
has been pull-up.

Signed-off-by: Jeongtae Park <jtp.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-03-28 16:17:54 +09:00
Jeongtae Park
cd0527c25b ARM: EXYNOS4: Fix smsc9215 irq polarity on SMDKV310
This patch fixes smsc9215 irq ploarity configuration of SMDKV310.
We can change type of EINT(5) as HIGH, but it's better to change
IRQ output of smsc9215 as an active low because smsc's IRQ line
has been pull-up.

Signed-off-by: Jeongtae Park <jtp.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-03-28 16:17:54 +09:00
Kukjin Kim
94fc1d80d6 ARM: EXYNOS4: Fix build warning on regarding SATA_AHCI_PLATFORM
This patch fixes following build warnings.

warning: (MACH_ARMLEX4210) selects SATA_AHCI_PLATFORM
          which has unmet direct dependencies (ATA)

And adds EXYNOX4_DEV_AHCI for building machines which are
not suppoort for AHCI feature on board.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-03-28 16:17:54 +09:00
Huang Weiyi
768fe2c31f ARM: S5PV210: Remove duplicated inclusion
Remove duplicated #include('s) in
  arch/arm/mach-s5pv210/mach-smdkv210.c

Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-03-28 16:17:53 +09:00
Vladimir Zapolskiy
912003e8f1 ARM: S5PV210: Fix security engine interrupt names
This change is intended to correct security subsystem interrupt names
for Samsung S5PV210 and S5PC110 SoCs.

Signed-off-by: Vladimir Zapolskiy <vzapolskiy@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-03-28 16:17:53 +09:00
Banajit Goswami
3814554d11 ARM: S5P64X0: Fix iodesc array size for S5P6450
The array size parameter of iotable_init for S5P6450 is incorrect.
Fix this by passing the correct length of s5p6450_iodesc table.

Signed-off-by: Banajit Goswami <banajit.g@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-03-28 16:17:53 +09:00
Linus Walleij
fe67dfc874 mach-ux500: configure board for the TPS61052 regulator v2
This registers the TPS61052 regulator to the ux500 MOP/HREF boards.

Cc: Samuel Ortiz <samuel.ortiz@intel.com>
Cc: Liam Girdwood <lrg@slimlogic.co.uk>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Ola Lilja <ola.o.lilja@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-03-28 08:54:23 +02:00
Bengt Jonsson
dfa3a824de mach-ux500: provide ab8500 init vector
This adds an ab8500 regulator initialization vector for the
HREF/MOP500 series of boards. This also sets the display
regulator to be on at boot so we don't loose our splash
screen when the board comes up.

Signed-off-by: Bengt Jonsson <bengt.g.jonsson@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-03-28 08:47:19 +02:00
Bibek Basu
3ef374a22b mach-ux500: board support for AB8500 GPIO driver
This is the board support patch for ab8500 gpio driver
on mach-ux500.Patch implements 16 virtual
IRQ mapped to 16 interrupt capable AB8500 GPIOs.

Signed-off-by: Bibek Basu <bibek.basu@stericsson.com>
[Modify for header file placement]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-03-28 08:47:18 +02:00
Linus Torvalds
18bcd0c8cb Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lrg/voltage-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lrg/voltage-2.6:
  regulator: Add MODULE_DEVICE_TABLE to max8997 and max8998
  regulator: fix tps6524x section mismatch
  regulator: Remove more wm831x-specific IRQ operations
  regulator: add ab8500 enable and raise time delays
  regulator: provide consumer interface for fall/rise time
  regulator: add set_voltage_time_sel infrastructure
  regulator: initialization for ab8500 regulators
  regulator: add support for USB voltage regulator
  regulator: switch the ab3100 to use enable_time()
  Regulator: add suspend-finish API for regulator core.
  regulator: fix typo in Kconfig
  regulator: Convert WM831x regulators to genirq
  regulator: If we fail when setting up a supply say which supply
2011-03-27 20:37:50 -07:00
Linus Torvalds
17c6dd8144 Merge branch 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6:
  hwspinlock: depend on OMAP4
  ARM: OMAP2+: Fix warnings for GPMC interrupt
  OMAP4: PandaBoard: remove unused power regulators
  arm: mach-omap2: omap_l3_smx: fix irq handler setup
  arm: mach-omap2: devices: fix omap3_l3_init() return value
2011-03-27 20:03:12 -07:00
Linus Torvalds
a17d47300b Merge branch 'for-linus-1' of git://git.infradead.org/mtd-2.6
* 'for-linus-1' of git://git.infradead.org/mtd-2.6: (49 commits)
  mtd: mtdswap: fix compilation warning
  mtdswap: kill strict error handling option
  mtd: nand: enable software BCH ECC in nand simulator
  mtd: nand: add software BCH ECC support
  mtd: fix printf format warnings, mostly lack of %zd for size_t, in mtdswap
  mtd: sm_rtl: check kmalloc return value
  mtd: cfi: add support for AMIC flashes (e.g. A29L160AT)
  lib: add shared BCH ECC library
  mtd: mxc_nand: fix OOB corruption when page size > 2KiB
  mtd: DaVinci: Removed header file that is not required
  mtd: pxa3xx_nand: clean the keep configure code
  mtd: pxa3xx_nand: mtd scan id process could be defined by driver itself
  mtd: pxa3xx_nand: unify prepare command
  mtd: pxa3xx_nand: discard wait_for_event,write_cmd,__readid function
  mtd: pxa3xx_nand: rework irq logic
  mtd: pxa3xx_nand: make scan procedure more clear
  mtd: speedtest: fix integer overflow
  mtd: mxc_nand: fix read past buffer end
  mtd: omap3: nand: report corrected ecc errors
  jffs2: remove a trailing white space in commentaries
  ...
2011-03-27 19:40:56 -07:00
Konstantin Porotchkin
dc7b602dd4 Fix the broken build for Marvell Dove platform.
Remove call to the old GPIO init function.
Fix old MPP control offset value.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Acked-by: Saeed Bishara <saeed.bishara@gmail.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
2011-03-27 09:22:52 -04:00
Bengt Jonsson
79568b9412 regulator: initialization for ab8500 regulators
The regulators on the AB8500 have a lot of custom
hardware control settings pertaining to 8 external
signals, settings which are board-specific and need
be provided from the platform at startup.

Initialization added for regulators Vana, VextSupply1,
VextSupply2, VextSupply3, Vaux1, Vaux2, Vaux3, VTVout,
Vintcore12, Vaudio, Vdmic, Vamic1, Vamic2, VrefDDR.

Signed-off-by: Bengt Jonsson <bengt.g.jonsson@stericsson.com>
Reviewed-by: Rickard Andersson <rickard.andersson@stericsson.com>
Reviewed-by: Jonas Aberg <jonas.aberg@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
2011-03-26 14:15:05 +00:00
Will Deacon
a737823d37 ARM: 6835/1: perf: ensure overflows aren't missed due to IRQ latency
If a counter overflows during a perf stat profiling run it may overtake
the last known value of the counter:

    0        prev     new                0xffffffff
    |----------|-------|----------------------|

In this case, the number of events that have occurred is
(0xffffffff - prev) + new. Unfortunately, the event update code will
not realise an overflow has occurred and will instead report the event
delta as (new - prev) which may be considerably smaller than the real
count.

This patch adds an extra argument to armpmu_event_update which indicates
whether or not an overflow has occurred. If an overflow has occurred
then we use the maximum period of the counter to calculate the elapsed
events.

Acked-by: Jamie Iles <jamie@jamieiles.com>
Reported-by: Ashwin Chaugule <ashwinc@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-03-26 10:06:09 +00:00
Will Deacon
574b69cbb6 ARM: 6834/1: perf: reset counters on all CPUs during initialisation
ARMv7 dictates that the interrupt-enable and count-enable registers for
each PMU counter are UNKNOWN following core reset.

This patch adds a new (optional) function pointer to struct arm_pmu for
resetting the PMU state during init. The reset function is called on
each CPU via an arch_initcall in the generic ARM perf_event code and
allows the PMU backend to write sane values to any UNKNOWN registers.

Acked-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-03-26 10:06:09 +00:00
Will Deacon
d25d3b4c4d ARM: 6833/1: perf: add required isbs() to ARMv7 backend
The ARMv7 architecture does not guarantee that effects from co-processor
writes are immediately visible to following instructions.

This patch adds two isbs to the ARMv7 perf code:

(1) Immediately after selecting an event register, so that the PMU state
    following this instruction is consistent with the new event.

(2) Immediately before writing to the PMCR, so that any previous writes
    to the PMU have taken effect before (typically) enabling the
    counters.

Acked-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-03-26 10:06:09 +00:00
Nicolas Pitre
fb4fe87d79 ARM: 6825/1: kernel/sleep.S: fix Thumb2 compilation issues
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Reviewed-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-03-26 10:06:08 +00:00
Pawel Moll
0efc48ecaf ARM: 6807/1: realview: Fix secondary GIC initialisation for EB with MPCore tile
The second GIC, present when EB board is used with a MPCore tile,
was initialised starting with irq number 64, which made interrupts
64-95 in the primary GIC unusable.

Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-03-26 10:06:08 +00:00