Now that Tegra's pinmux is configured solely from device tree, there's
no need for the pinconf types to be defined in arch/arm/mach-tegra/.
Move it into the pinctrl directory to clean up mach-tegra, as a pre-
requisite for single-zImage.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Nothing from these files is needed, so remove the includes. This helps
single zImage work by reducing use of the mach-tegra/include/mach/
directory.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Now that all boards are converted to device tree, devices.[ch] and
board-pinmux.[ch] are no longer used. So, remove them.
The only exception is the EHCI platform data in devices.h. Move that
data to board-dt-tegra20.c - the only places it's used.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Harmony uses a TPS6586x regulator. Instantiate this, and hook up a
couple of fixed GPIO-controlled regulators too.
Based on Ventana regulator patch by Stephen Warren <swarren@nvidia.com>
and converted to Harmony.
swarren made the following changes:
* Added ldo0 regulator configuration to device tree, and updated
board-harmony-pcie.c for the new regulator name.
* Fixed vdd_1v05's voltage from 10.5V to 1.05V.
* Modified board-harmony-pcie.c to obtain the en_vdd_1v05 GPIO number at
run-time from device tree instead of hard-coding it.
* Removed board-harmony{-power.c,.h} now that they're unused.
* Disabled vdd_1v05 regulator; the code in board-harmony-pcie.c hijacks
this GPIO for now. This will be fixed when the PCIe driver is re-
written as a driver. The code can't regulator_get("vdd_1v05") right
now, because the vdd_1v05 regulator's probe gets deferred due to its
supply being the PMIC, which gets probed after the regulator the first
time around, and this dependency is only resolved by repeated probing,
which happens when deferred_probe_initcall() is called, which happens
in a late initcall, whose runtime order relative to harmony_pcie_init()
is undefined, since that's also called from a late initcall.
* Removed unused harmony_pcie_initcall().
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Harmony can be booted using device tree with equal functionality as when
booted using a board file. Remove as much of the board file as is
possible, since it's no longer needed.
Two special-cases are still left in board-dt-tegra20.c, since the Tegra
PCIe driver doesn't support device tree yet, and the Harmony .dts file
doesn't yet describe regulators which are needed for PCIe. This logic is
now enabled unconditionally rather than via CONFIG_MACH_HARMONY. While
this is more code than other boards, it's still unlikely to be much of a
problem, and both regulators and PCIe should be supported via device tree
in the near future, allowing the remaining code to be removed.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Paz00 (Toshiba AC100) can be booted using device tree with equal
functionality as when booted using a board file. Remove as much of the
board file as is possible, since it's no longer needed.
One special-case is still left in board-dt-tegra20.c, since there is no
way to create a WiFi rfkill device from device tree yet. This logic is
now enabled unconditionally rather than via CONFIG_MACH_PAZ00. The extra
cases where it's enabled (.configs which did not enable Paz00 support)
shouldn't impact much since the amount of code is tiny.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-By: Marc Dietrich <marvin24@gmx.de>
TrimSlice can be booted using device tree with equal functionality as
when booted using a board file. Remove the board file since it's no
longer needed.
One special-case is still left in board-dt-tegra20.c, since the Tegra
PCIe driver doesn't support device tree yet. This logic is now enabled
by CONFIG_TEGRA_PCI rather than via CONFIG_MACH_TRIMSLICE. The extra
cases where it's enabled (.configs which did not enable TrimSlice
support) shouldn't impact much since the amount of code is tiny.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Clockevent's frequency is changed upon cpufreq change
notification. It fetches local timer's rate to update the
clockevent frequency. This patch adds local timer clock
for Tegra20.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
When changing a PLL's rate, it must have no active children. The CPU
clock cannot be stopped, and CPU clock's divider is not used. The old
clock driver used to handle this by internally reparenting the CPU clock
onto a different PLL when changing the CPU clock rate. However, the new
common-clock based clock driver does not do this, and probably cannot do
this due to the locking issues it would cause.
To solve this, have the Tegra cpufreq driver explicitly perform the
reparenting operations itself. This is probably reasonable anyway,
since such reparenting is somewhat a matter of policy (e.g. which
alternate clock source to use, whether to leave the CPU clock a child
of the alternate clock source if it's running at the desired rate),
and hence is something more appropriate for the cpufreq driver than
the core clock driver anyway.
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
32-bit math isn't enough when e.g. *prate=12000000, and sel->n=1000.
Use 64-bit math to prevent this.
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Warnings were generated because following commit changed data type for
address pointer
195bbca ARM: 7500/1: io: avoid writeback addressing modes for __raw_ accessors
arch/arm/mach-tegra/tegra30_clocks.c: In function 'clk_measure_input_freq':
arch/arm/mach-tegra/tegra30_clocks.c:418:2: warning: passing argument 2 of '__raw_writel' makes pointer from integer without a cast
.../arch/arm/include/asm/io.h:88:20: note: expected 'volatile void *' but argument is of type 'unsigned int
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
tegra_time is a struct sys_timer, not a struct clk, so can't be included
in an array of struct clk *.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
It should use tegra30_audio_sync_clk_ops for tegra30. It will cause
the tegra30 use the wrong audio_sync_clk_ops when build a kernel with
a tegra20 and tegra30 both supported kernel. And building error when
a tegra30-only kernel.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Currently the tegra20 and tegra30 share the same symbol for
tegra_clk_32k_ops. This will cause a compile error when building
a tegra20-only kernel image. Add tegra_clk_32k_ops for tegra20 and
modify tegra30_clk_32k_ops for tegra30.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This patch converts tegra clock code to generic clock framework in following way:
- Implement clk_ops as required by generic clk framework. (tegraXX_clocks.c)
- Use platform specific struct clk_tegra in clk_ops implementation instead of struct clk.
- Initialize all clock data statically. (tegraXX_clocks_data.c)
Legacy framework did not have recalc_rate and is_enabled functions. Implemented these functions.
Removed init function. It's functionality is splitted into recalc_rate and is_enabled.
Static initialization is used since slab is not up in .init_early and clock
is needed to be initialized before clockevent/clocksource initialization.
Macros redefined for clk_tegra.
Also, single struct clk_tegra is used for all type of clocks (PLL, peripheral etc.). This
is to move quickly to generic common clock framework so that other dependent features will
not be blocked (such as DT binding).
Enabling COMMON_CLOCK config moved to ARCH_TEGRA since it is enabled for both Tegra20
and Tegra30.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add Tegra platform specific clock structure clk_tegra and
some helper functions for generic clock framework.
struct clk_tegra is the single strcture used for all types of
clocks. reset and cfg_ex ops moved to clk_tegra from clk_ops.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Make the name consistent with other files.
s/tegra2/tegra20
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Move clock initialization data to separate file. This is
required for migrating to generic clock framework if static
initialization is used.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Move clock initialization data to separate file. This is
required for migrating to generic clock framework if static
initialization is used.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
A U16 divider can divide a clock by 1..64K. However, the range-check
in clk_div16_get_divider() limited the range to 1..256. Fix this. NVIDIA's
downstream kernels already have the fixed range-check.
In practice this is a problem on Whistler's I2C bus, which uses a bus
clock rate of 100KHz (rather than the more common 400KHz on Tegra boards),
which requires a HW module clock of 8*100KHz. The parent clock is 216MHz,
leading to a desired divider of 270. Prior to conversion to the common
clock framework, this range error was somehow ignored/irrelevant and
caused no problems. However, the common clock framework evidently has
more rigorous error-checking, so this failure causes the I2C bus to fail
to operate correctly.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Some boards use UART D for the main serial console, and some use UART A.
UART D's clock is listed in board-dt-tegra20.c's clock table, whereas
UART A's clock is not. This causes the clock code to think UART A's
clock is unsed. The common clock framework turns off unused clocks at
boot time. This makes the kernel appear to hang. Add UART A's clock into
the clock table to prevent this. Eventually, this requirement should be
handled by the UART driver, and/or properties in a board-specific device
tree file.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARCH_TEGRA (arch/arm/Kconfig) now selects USE_OF, so there's not need
for ARCH_TEGRA_3x_SOC to do so too.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Use macro IO_ADDRESS for getting virtual address of
corresponding physical address to make the consistency
with rest of Tegra code-base.
This macro calls the IO_TO_VIRT() which is defined in
arch/arm/mach-tegra/include/mach/iomap.h
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Device have SYS rail which is always ON. It is system power bus. LDO5
and LDO_RTC get powered through this rail internally. Add support for
this rail and make the LDO5/LDO_RTC supply by it. Update document
accordingly.
[swarren: Instantiate the sys regulator from board-harmony-power.c to
avoid regression.]
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
As part of this patch:
1. Moved existing tegra phy driver to drivers/USB directory.
2. Added standard USB phy driver APIs to tegra phy driver.
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Commit 3d55c29 "ARM: tegra: harmony: add regulator supply name and its
input supply" was supposed to fix all the problems with regulators on
Harmony. However, it appears that I only tested it when booting using
board files, not when booting using device tree. This change fixes two
problems with regulators when booting using device tree:
1) That patch only created the vdd_sys regulator when booting using a
board file. Since this is the root of the whole regulator tree, this
caused no regulators to successfully initialize when booting using
device tree. The registration of vdd_sys is moved to fix this.
2) When booting use DT, the regulator core sets has_full_constraints,
which in turn causes the core to turn off any regulators not marked
as always on. Some of the affected regulators are required for basic
system operation. To solve this, add always on constraints to all
relevant regulators. This doesn't affect booting using a board file
since nothing sets has_full_constraints in that case.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull PWM subsystem from Thierry Reding:
"The new PWM subsystem aims at collecting all implementations of the
legacy PWM API and to eventually replace it completely.
The subsystem has been in development for over half a year now and
many drivers have already been converted. It has been in linux-next
for a couple of weeks and there have been no major issues so I think
it is ready for inclusion in your tree."
Arnd Bergmann <arnd@arndb.de>:
"Very much Ack on the new subsystem. It uses the interface
declarations as the previously separate pwm drivers, so nothing
changes for now in the drivers using it, although it enables us to
change those more easily in the future if we want to.
This work is also one of the missing pieces that are required to
eventually build ARM kernels for multiple platforms, which is
currently prohibited (amongs other things) by the fact that you cannot
have more than one driver exporting the pwm functions."
Tested-and-acked-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Philip, Avinash <avinashphilip@ti.com> # TI's AM33xx platforms
Acked-By: Alexandre Pereira da Silva <aletes.xgr@gmail.com> # LPC32XX
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Sachin Kamat <sachin.kamat@linaro.org>
Fix up trivial conflicts with other cleanups and DT updates.
* 'for-3.6' of git://gitorious.org/linux-pwm/linux-pwm: (36 commits)
pwm: pwm-tiehrpwm: PWM driver support for EHRPWM
pwm: pwm-tiecap: PWM driver support for ECAP APWM
pwm: fix used-uninitialized warning in pwm_get()
pwm: add lpc32xx PWM support
pwm_backlight: pass correct brightness to callback
pwm: Use pr_* functions in pwm-samsung.c file
pwm: Convert pwm-samsung to use devm_* APIs
pwm: Convert pwm-tegra to use devm_clk_get()
pwm: pwm-mxs: Return proper error if pwmchip_remove() fails
pwm: pwm-bfin: Return proper error if pwmchip_remove() fails
pwm: pxa: Propagate pwmchip_remove() error
pwm: Convert pwm-pxa to use devm_* APIs
pwm: Convert pwm-vt8500 to use devm_* APIs
pwm: Convert pwm-imx to use devm_* APIs
pwm: Conflict with legacy PWM API
pwm: pwm-mxs: add pinctrl support
pwm: pwm-mxs: use devm_* managed functions
pwm: pwm-mxs: use global reset function stmp_reset_block
pwm: pwm-mxs: encode soc name in compatible string
pwm: Take over maintainership of the PWM subsystem
...
Name the regulator as per board schematics and adds its
supply name info in regulator data.
Add the always on fixed regulator to refer the battery supply.
Use this fixed regulator for input supply of some of PMIC
regulator
This patch was originally part of a 2-patch series. Patch 2 got applied
to the regulator tree as 7c7fac3 "regulator: tps6586x: add support for
input supply" without this patch. This broke regulator support on
Harmony.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: added dependency info to commit description]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Clock support is moving to the clk subsystem. These tegra, omap and imx
changes are for code that is still platform specific and not (yet)
part of that subsystem.
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Merge tag 'clk' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc clk changes from Arnd Bergmann:
"Clock support is moving to the clk subsystem. These tegra, omap and
imx changes are for code that is still platform specific and not (yet)
part of that subsystem."
Fix up conflicts in arch/arm/mach-{imx/clk-imx51-imx53.c,omap2/Makefile}
* tag 'clk' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (23 commits)
ARM: imx: clk-imx31: Fix clock id for rnga driver
ARM: imx: add missing item to the list of clock event modes
ARM: i.MX5x CSPI: Fixed clock name for CSPI
ARM: i.MX5x clocks: Fix GPT clocks
ARM: i.MX5x clocks: Fix parent for PWM clocks
ARM: i.MX5x clocks: Add EPIT support
ARM: mx27: Reenable silicon version print
ARM: clk-imx27: Fix rtc clock id
ARM: tegra: Provide clock for only one PWM controller
ARM: tegra: Fix PWM clock programming
ARM: OMAP3+: clock33xx: Add AM33XX clock tree data
ARM: OMAP3+: clock: Move common clksel_rate & clock data to common file
ARM: tegra: dma: rename driver name for clock to "tegra-apbdma"
ARM: tegra: Remove second instance of uart clk
crypto: add clk_prepare/clk_unprepare
ASoC: tegra: add clk_prepare/clk_unprepare
staging: nvec: add clk_prepare/clk_unprepare
spi/tegra: add clk_prepare/clk_unprepare
Input: tegra-kbc - add clk_prepare/clk_unprepare
USB: ehci-tegra: add clk_prepare/clk_unprepare
...
These changes are all for individual board files. In the long run, those
files will largely go away, and the amount of changes appears to be
continuously decreasing, which is a good sign. This time around, changes
are focused on tegra, omap and samsung.
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Merge tag 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc board specific updates from Arnd Bergmann:
"These changes are all for individual board files. In the long run,
those files will largely go away, and the amount of changes appears to
be continuously decreasing, which is a good sign. This time around,
changes are focused on tegra, omap and samsung."
Fix conflicts in arch/arm/mach-{omap2/common-board-devices.c,tegra/Makefile.boot}
as per the 'for-linus' branch.
* tag 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (39 commits)
ARM: EXYNOS: Add leds status1 and status2 on Origen board
ARM: S3C64XX: Mark most Cragganmore initdata devinitdata
ARM: EXYNOS: Add missing .reserve field to SMDKC210
ARM: EXYNOS: Add DRM device to SMDK4X12 board
ARM: S3C64XX: Clean up after SPI driver platform data updates
ARM: SAMSUNG: no need to set the value for clk_xusbxti when it is 24Mhz
ARM: EXYNOS: Add framebuffer support for SMDK4X12
ARM: EXYNOS: Add HSOTG support to SMDK4X12
ARM: S5PV210: Add audio platform device in Goni board
ARM: S5PV210: Add audio platform device in Aquila board
ARM: EXYNOS: Add audio platform device in SMDKV310 board
ARM: S3C64XX: Don't specify an irq_base for WM1192-EV1 board
ARM: OMAP3: Fix omap3evm randconfig error introduced by VBUS support
ARM: OMAP: board-omap4panda: MUX configuration for sys_nirq2
ARM: OMAP: board-4430sdp: MUX configuration for sys_nirq2
ARM: OMAP3530evm: set pendown_state and debounce time for ads7846
ARM: omap3evm: enable VBUS switch for EHCI tranceiver
ARM: OMAP3EVM: Adding USB internal LDOs board file
ARM: OMAP3EVM: Add NAND flash definition
ARM: OMAP3: cm-t35: add tvp5150 decoder support
...
This branch contains two kinds of updates: Some platforms in the process
of getting converted to device tree based booting, and the platform
specific patches necessary for that are included here. Other platforms
are already converted, so we just need to update the actual device
tree source files and the binding documents to add support for new board
and new drivers.
In the future we will probably separate those into two branches, and
in the long run, the plan is to move the device tree source files out
of the kernel repository, but that has to wait until we have completed
a much larger portion of the binding documents.
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Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc device tree description updates from Arnd Bergmann:
"This branch contains two kinds of updates: Some platforms in the
process of getting converted to device tree based booting, and the
platform specific patches necessary for that are included here.
Other platforms are already converted, so we just need to update the
actual device tree source files and the binding documents to add
support for new board and new drivers.
In the future we will probably separate those into two branches, and
in the long run, the plan is to move the device tree source files out
of the kernel repository, but that has to wait until we have completed
a much larger portion of the binding documents."
Fix up trivial conflicts in arch/arm/mach-imx/clk-imx6q.c due to newly
added clkdev registers next to a few removed unnecessary ones.
* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (119 commits)
ARM: LPC32xx: Add PWM to base dts file
ARM: EXYNOS: mark the DMA channel binding for SPI as preliminary
ARM: dts: Add nodes for spi controllers for SAMSUNG EXYNOS5 platforms
ARM: EXYNOS: Enable platform support for SPI controllers for EXYNOS5
ARM: EXYNOS: Add spi clock support for EXYNOS5
ARM: dts: Add nodes for spi controllers for SAMSUNG EXYNOS4 platforms
ARM: EXYNOS: Enable platform support for SPI controllers for EXYNOX4
ARM: EXYNOS: Fix the incorrect hierarchy of spi controller bus clock
ARM: ux500: Remove PMU platform registration when booting with DT
ARM: ux500: Remove temporary snowball_of_platform_devs enablement structure
ARM: ux500: Ensure vendor specific properties have the vendor's identifier
pinctrl: pinctrl-nomadik: Append sleepmode property with vendor specific prefixes
ARM: ux500: Move rtc-pl031 registration to Device Tree when enabled
ARM: ux500: Enable the AB8500 RTC for all DT:ed DB8500 based devices
ARM: ux500: Correctly reference IRQs supplied by the AB8500 from Device Tree
ARM: ux500: Apply ab8500-debug node do the db8500 DT structure
ARM: ux500: Add a ab8500-usb Device Tree node for db8500 based devices
ARM: ux500: Add db8500 Device Tree node for misc/ab8500-pwm
ARM: ux500: Add db8500 Device Tree node for ab8500-sysctrl
ARM: ux500: Enable LED heartbeat functionality on Snowbal via DT
...
This is stuff that does not fit well into another category and in
particular is not related to a particular board. The largest part
in here is extending the am33xx support in the omap platform.
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Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm soc-specific updates from Arnd Bergmann:
"This is stuff that does not fit well into another category and in
particular is not related to a particular board. The largest part in
here is extending the am33xx support in the omap platform."
Fix up trivial conflicts in arch/arm/mach-{imx/mach-mx35_3ds.c, tegra/Makefile}
* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (74 commits)
ARM: LPC32xx: Add PWM support
ARM: LPC32xx: Add PWM clock
ARM: LPC32xx: Set system serial based on cpu unique id
ARM: vexpress: Config option for early printk console
ARM: vexpress: Add Device Tree for V2P-CA15_CA7 core tile
ARM: vexpress: Convert V2P-CA15 Device Tree to 64 bit addresses
ARM: vexpress: Add fixed regulator for SMSC
ARM: vexpress: Add missing SP804 interrupt in motherboard's DTS files
ARM: vexpress: Initial common clock support
ARM: SAMSUNG: Introduce Kconfig variable for Samsung custom clk API
ARM: EXYNOS: Add missing static storage class specifier in pmu.c file
ARM: EXYNOS: Make combiner_init function static
ARM: EXYNOS: Update HSOTG PHY clock setting for EXYNOS4X12
ARM: versatile: Make plat-versatile clock optional
ARM: vexpress: Check master site in daughterboard's sysctl operations
ARM: vexpress: remove automatic errata workaround selection
ARM: LPC32xx: Adjust to pl08x DMA interface changes
ARM: EXYNOS: Clear SYS_WDTRESET bit to use watchdog reset
ARM: imx: fix mx51 ehci setup errors
ARM: imx: make ehci power/oc polarities configurable
...
This branch contains changes to Tegra device tree files, and related
Kconfig and Makefile changes. Highlights are:
* New support for the Whistler board.
* Use of the I2C pinctrl-based bus mux on Seaboard/Springbank.
This branch is based on Tegra's for-3.6/cleanup branch from a previous
pull request.
* 'for-3.6/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: dt: tegra seaboard: move battery monitor to mux'd I2C bus.
ARM: dt: tegra: seaboard: instantiate pinctrl-based I2C bus mux
ARM: dt: tegra: add Whistler device tree file
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Stephen Warren <swarren@wwwdotorg.org>:
This branch contains numerous changes required as a baseline in order to
convert Tegra to the common clock framework. The intention was to also
include patches to actually convert Tegra to the common clock framework.
However, those patches appeared late in the kernel cycle and currently
cause regressions on some boards, so were dropped for now.
* 'for-3.6/common-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: Provide clock for only one PWM controller
ARM: tegra: Fix PWM clock programming
ARM: tegra: dma: rename driver name for clock to "tegra-apbdma"
ARM: tegra: Remove second instance of uart clk
crypto: add clk_prepare/clk_unprepare
ASoC: tegra: add clk_prepare/clk_unprepare
staging: nvec: add clk_prepare/clk_unprepare
spi/tegra: add clk_prepare/clk_unprepare
Input: tegra-kbc - add clk_prepare/clk_unprepare
USB: ehci-tegra: add clk_prepare/clk_unprepare
mmc: tegra: add clk_prepare/clk_unprepare
i2c: tegra: Add clk_prepare/clk_unprepare
ARM: tegra: add clk_prepare/clk_unprepare
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Stephen Warren <swarren@wwwdotorg.org>
This branch contains changes to Tegra board files, and related Kconfig and
Makefile changes. Highlights include:
* Removal of Seaboard/Springbank board files; these boards can now only be
used with device tree.
* Use of small parts of some non-DT board files from the DT board files. This
enables all features that the non-DT board files have, when booting from DT.
This will allow almost complete removal of all non-DT board files in v3.7.
* Other miscellaneous changes.
This branch is based on Tegra's for-3.6/cleanup branch from a previous pull
request.
* 'for-3.6/boards' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: use of_default_bus_match_table
ARM: tegra: add device tree AUXDATA for APBDMA
ARM: tegra: paz00: enable WiFi rfkill when booting from device tree
ARM: tegra: harmony: init regulators, PCIe when booting from DT
ARM: tegra: trimslice: enable PCIe when booting from device tree
ARM: tegra: remove Seaboard board files
ARM: tegra: remove CONFIG_MACH_TEGRA_DT
ARM: tegra: make .dts compilation depend on Tegra2 support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Whistler is a highly configurable Tegra evaluation and development board.
This change adds support for the following specific configuration:
E1120 motherboard
E1108 CPU board
E1116 PMU board
The motherboard configuration switches are set as follows:
SW1=0 SW2=0 SW3=5
S1/S2/S3/S4 all on, except S3 7/8 are off.
Other combinations of daugher boards may work to varying degrees, but will
likely require some SW adjustment.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Use the dmaengine based Tegra APB DMA driver for
apbio access in place of legacy Tegra APB DMA.
The new driver is selected if legacy driver is not
selected and new DMA driver is enabled through config
file.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: s/pr_err/pr_debug/ in tegra_apb_dma_init; this condition is
expected to fire repeatedly before the DMA driver is available]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The Tegra20 HW issue with accessing APBIO registers (such
as fuse registers) directly from the CPU concurrently with
APB DMA accesses has been fixed in Tegra30 and later chips.
Access these registers directly from the CPU on Tegra30
and later, and apply the workaround only for Tegra20.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Chaitanya Bandi <bandik@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
A subsequent patch will add a generic PWM API driver for the Tegra PWFM
controller, supporting all four PWM devices with a single PWM chip. The
device will be named tegra-pwm and only one clock needs to be provided.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
PWM clock source registers in Tegra 2 have different clock source selection bit
fields than other registers. PWM clock source bits in CLK_SOURCE_PWM_0 register
are located at bit field bit[30:28] while others are at bit field bit[31:30] in
their respective clock source register.
This patch updates the clock programming to correctly reflect that, by adding a
flag to indicate the alternate bit field format and checking for it when
selecting a clock source (parent clock).
Signed-off-by: Bill Huang <bilhuang@nvidia.com>
Signed-off-by: Simon Que <sque@chromium.org>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
