Now that the Blackfin machine drivers have been updated to the
multicomponent support, update the resources to match. The pin
settings are now a board issue and removed from the driver.
Signed-off-by: Scott Jiang <scott.jiang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The BF537 SIC combines the gpio port H mask A interrupts with the
emac rx interrupt, so we need to demux this in software.
It also combines the gpio port H mask B and the emac tx interrupts,
and the watchdog and port F mask B interrupts, but since we don't
support mask B yet, just add the defines for now.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The SIC interrupt line muxing that the bf537 does is specific to this
CPU (thankfully), so rip it out of the common code and move it to a
bf537-specific file. This tidies up the common code significantly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
These files had a lot of whitespace damage, mostly due to copying and
pasting original files that had damage.
The BF561 header also had a lot of unused CONFIG_DEF_xxx defines, so
punt them all.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Start a new common IRQ header and move all of the CEC pieces there. This
lets the individual part headers worry just about its SIC defines.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
No code uses these, and the short define names are polluting the global
namespace where they collide with things like common irq files. So just
punt the damned things. If in the future we need HDMA support, we can
make a standalone header for these things.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The board doesn't actually have a pin hooked up to do card detection,
so punt the code for it.
Signed-off-by: Andreas Schallenberg <Andreas.Schallenberg@3alitydigital.de>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The SPORT/UART driver doesn't use the secondary channel pins, so don't
try and request them thus keeping other drivers from using them.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
These were only included because of the irq handling of the PLL funcs,
and those PLL funcs have been moved out into their own header now.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The main asm/blackfin.h header will pull in mach/blackfin.h to get
all the fun Blackfin defines. So having any of the sub-mach headers
trying to include asm/blackfin.h makes no sense -- punt it.
The mach/blackfin.h header takes care of including the part-specific
def headers which in turn will include any other needed def file.
Similarly, it takes care of pulling in the part-specific cdef header.
So move this logic out of the blackfin.h when necessary.
Further, make sure the cdef headers do not waste time including the
def headers again.
Since all parts need the common def/cdef headers, move this logic
out of the part-specific headers and into the mach/blackfin.h file.
Finally, we need to split the BF539 def header since the BF538 does
not have MXVR and we don't want to expose those MMRs.
So now all parts should have the same behavior:
mach/blackfin.h
asm/def_LPBlackfin.h
part-specific def.h
if ! asm
asm/cdef_LPBlackfin.h
part-specific cdef.h
And the sub def/cdef headers only tail into what they need.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Use the same naming convention for DMA traffic MMRs (most were legacy
anyways) so we can avoid useless ifdef trees.
Same goes for MDMA names -- this actually allows us to undo a bunch of
ifdef redirects that existed for this purpose alone.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Each Blackfin port has been duplicating UART structures and defines when
there really is no need for it. So start a new bfin_serial.h header to
unify all these pieces and give ourselves a fresh start.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Move all the pin settings out of the Kconfig and into the platform
resources (MII vs RMII). This clean up also lets us push out the
phy settings so that board porters may control the layout.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The predefined i2c address 0x2c doesn't match the configuration of the
ad5280 PINs AD0 and AD1 on the tftlcd add-on board. Both AD0 and AD1
are of voltage 3.3V, which means the i2c address should be 0x2F.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We don't need our own header and structure to hook up the ad5398 part,
so drop the custom resources for it.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Rather than write our own ADP switch driver, use the existing fixed
regulator driver and rewrite the platform resources accordingly.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Some peripherals might generate an error interrupt shortly after the
data interrupt due to the fact that the peripheral isn't serviced fast
enough. In most cases this isn't a problem and is expected behavior.
This hasn't been a problem on most parts since you simply don't request
the error interrupt (or you leave it disabled while there is an expected
state) and do the peripheral status checking in the data interrupt.
The Blackfin SIC allows people to prioritize data and error interrupts,
and the Blackfin CEC allows interrupts of equal or higher priority to
nest. The current default settings gives error interrupts a higher
priority than data interrupts. So if an error occurs while processing
the data interrupt, it will be serviced immediately.
However, the error interrupt on the BF537 SIC cannot be enabled on a
per-peripheral basis. Once the error interrupt is enabled for one
peripheral, it is automatically enabled for all peripherals.
Therefore lower the default multiplexed error interrupt priority so
most people need not worry themselves with this issue.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
With the recent kernel update the isp1362-hcd driver evaluates the
IORESOURCE_IRQ resource flags and requests the irq with the given
polarity/edge settings. However the ISP1362 config requires low
level/edge interrupts. Most of the Blackfin boards use some random
flag or no flag at all. Make all boards use a know good flag
IORESOURCE_IRQ_LOWEDGE.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Make sure we use the right Kconfig names and platform strings.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Now that we've rewritten the GPIO CS handling in the Blackfin SPI
peripheral, we need to update the platform resources accordingly.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Now that the common header defines everything and the SPI drivers are
using it, we can drop these duplicated global namespace polluters.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Rename h/w IRQ flags handling functions to be in line with what is expected for
the irq renaming patch. This renames local_*_hw() to hard_local_*() using the
following perl command:
perl -pi -e 's/local_irq_(restore|enable|disable)_hw/hard_local_irq_\1/ or s/local_irq_save_hw([_a-z]*)[(]flags[)]/flags = hard_local_irq_save\1()/' `find arch/blackfin/ -name "*.[ch]"`
and then fixing up asm/irqflags.h manually.
Additionally, arch/hard_local_save_flags() and arch/hard_local_irq_save() both
return the flags rather than passing it through the argument list.
Signed-off-by: David Howells <dhowells@redhat.com>
Split the PLL control code from the Blackfin machine-specific cdef headers so
that the irqflags functions can be renamed without incurring a header loop.
Signed-off-by: David Howells <dhowells@redhat.com>
The common bfin_sport.h header now has unified definitions of these, so
stop polluting the global namespace.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
These two platforms didn't properly fill nr_chips in gen_nand
registration and therefore depended on gen_nand bug fixed by by commit
81cbb0b177 ("mtd: gen_nand: fix support for
multiple chips")
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
To avoid more patches, I also fixed other spelling
and grammar bugs when they were in the same or
following line:
successfull -> successful
parse -> parses
controler -> controller
controlers -> controllers
Cc: Jiri Kosina <trivial@kernel.org>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
The standard short name for control is CTL and not CTRL. Use TWI0_xxx
even on parts that only have one TWI bus to keep things simple. Drop
all the cdef helpers since the bus driver takes care of everything.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This is parallel to the existing P_DEFAULT_BOOT_SPI_CS, but in terms of
the GPIO value so it can be used with the normal gpio API.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
