Add device nodes for the four instances of dw_mmc controllers in
EXYNOS5250 and enable instance 0 and 2 for the SMDK5250 board.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add entries if MSHC controllers in AUXDATA table for correct
device name initialization.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add clock instances for bic("bus interface unit clock") and ciu("card
interface unit clock") of the all four MSHC controller instances.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
On board keys on Origen board can serve as wakeup sources,
hence they are marked accordingly in the device tree file.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit adds basic device tree for Exynos4210-based Trats board.
Currently it provides support for eMMC over sdhci and MAX8997 PMIC.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Currently all boards must explicitly disable all unused device tree
nodes of unused components (e.g. i2c, sdhci, etc...). This makes it
necessary to all boards to be aware of all components on the SoC, which
in turns makes board dts files longer and more difficult to maintain
(e.g. adding new components to SoC-level tree requires adding nodes with
status="disabled" to every board).
This patch changes "status" of all optional components in SoC-level dts
file to "disabled", adds status="okay" to respective nodes of used
components in dts of all boards and removes all nodes with only
status="disabled" from boards dts.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Since mach-exynos4-dt.c is also going to be used for other SoCs from EXYNOS4
line, rename internal structures and functions to use exynos4_ prefix, instead
of exynos4210_.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Most definitions from exynos4210.dtsi can be applied for other SoCs from
EXYNOS4 line as well, so move the common part into separate file that
can be included by dtsi files of other EXYNOS4 SoCs (as well as current
exynos4210.dtsi).
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
[kgene.kim@samsung.com: Dongjin Kim <dongjin.kim@agreeyamobility.net>
submitted a similar patch 'Add DTS files derived from common EXYNOS4'
before this but I picked this up because of included exynos4x12 stuff]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Pull one more DMA-mapping fix from Marek Szyprowski:
"This patch fixes very subtle bug (typical off-by-one error) which
might appear in very rare circumstances."
* 'fixes-for-3.6' of git://git.linaro.org/people/mszyprowski/linux-dma-mapping:
arm: mm: fix DMA pool affiliation check
- A set of OMAP fixes, about half of them PM/clock related, the rest
scattered over the platform code but all small and targeted to real bugs.
- Two small i.MX fixes for SSI device clock setup.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJQUYT/AAoJEIwa5zzehBx3m7UQAIW17Uzqfw+5KGhh0UMSVPuq
XQznJRadYAlLwRK8O/K6aJ1TnHa21BrVSa8F2y9KHthM7YhGplzcluNMUtOGRCsM
HUceddSqy7DQp7CcwAJSb+VHd5I1d7iVbEp3oU3BD0OGQM6J0ddfUUo6a2fnpETV
E6JpHhllB7NXVq8Bx5gy/M9idaUdjxNyAEe62pjmVmvK2wi1l1323wiMYpcU8i9t
wBPHRDvYAHLju1j9qVZQa8gZ6EEGqqCaSIbCmX3omuuFFkmZHRHJSqv428LKa8lN
i8CfknJJTVDt+9RojJ+P4VuAMr+PWdZmL6cWS1dVz4KZsnG7eyfD3e4GczCd7UEd
YKLLh/0B1Oo+dH+6kXK8RscC5P38zRxT3fmpZ6R7yePGuYQJHkuMaBq8Lg46blJR
m+bTWrGoZByO1XCmebh2lCfu8PsuuksuTwr7Lu3ekDhZF5vDr9KFlmyts4lLTSaW
zjWjoAJa8334w1rRRnR4eWllFRx62VJWkZiQU5jlV6V01/FedLB0/RxPMT6RRDiw
DoCLPWIPe0ft2qgSTrPcbIVqcQcpzwVsPKq8OHcYUA6cILg7Q5Rix/V1FbVlw1ac
ob63CBSA7vxoN5PlErLO7eAluEmQjM45drQ5d6THdkihM/uzZ44VJ/pwW67ZmahW
jtH+5XOSNVsZU0dk/9dY
=y6Db
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc bug fixes from Olof Johansson:
- A set of OMAP fixes, about half of them PM/clock related, the rest
scattered over the platform code but all small and targeted to real
bugs.
- Two small i.MX fixes for SSI device clock setup.
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: clk-imx35: Fix SSI clock registration
ARM: clk-imx25: Fix SSI clock registration
ARM: OMAP4: Fix array size for irq_target_cpu
ARM: OMAP4: hwmod data: temporarily comment out data for the sl2if IP block
ARM: OMAP: hwmod code: Disable module when hwmod enable fails
ARM: OMAP3: hwmod data: fix iva2 reset info
ARM: OMAP3xxx: clockdomain: fix software supervised wakeup/sleep
ARM: OMAP2+: am33xx: Fix the timer fck clock naming convention
ARM: OMAP: Config fix for omap3-touchbook board
ARM: OMAP: sram: skip the first 16K on OMAP3 HS
ARM: OMAP: sram: fix OMAP4 errata handling
ARM: OMAP: timer: obey the !CONFIG_OMAP_32K_TIMER
Generic PWM framework requires that the board setup code
register a static mapping that can be used to match PWM
consumers to providers.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: <thierry.reding@avionic-design.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Generic PWM framework requires that the board setup code
register a static mapping that can be used to match PWM
consumers to providers.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: <thierry.reding@avionic-design.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Pull ARM fixes from Russell King:
"It's been a while... so there's a little more here than normal.
Mostly updates from Will for the breakpoint stuff, and plugging a few
holes in the user access functions which crept in when domain support
was disabled for ARMv7 CPUs."
* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
ARM: 7529/1: delay: set loops_per_jiffy when moving to timer-based loop
ARM: 7528/1: uaccess: annotate [__]{get,put}_user functions with might_fault()
ARM: 7527/1: uaccess: explicitly check __user pointer when !CPU_USE_DOMAINS
ARM: 7526/1: traps: send SIGILL if get_user fails on undef handling path
ARM: 7521/1: Fix semihosting Kconfig text
ARM: 7513/1: Make sure dtc is built before running it
ARM: 7512/1: Fix XIP build due to PHYS_OFFSET definition moving
ARM: 7499/1: mm: Fix vmalloc overlap check for !HIGHMEM
ARM: 7503/1: mm: only flush both pmd entries for classic MMU
ARM: 7502/1: contextidr: avoid using bfi instruction during notifier
ARM: 7501/1: decompressor: reset ttbcr for VMSA ARMv7 cores
ARM: 7497/1: hw_breakpoint: allow single-byte watchpoints on all addresses
ARM: 7496/1: hw_breakpoint: don't rely on dfsr to show watchpoint access type
ARM: Fix ioremap() of address zero
SSI block has two types of clock:
ipg: bus clock, the clock needed for accessing registers.
per: peripheral clock, the clock needed for generating the bit rate.
Currently SSI driver only supports slave mode and only need to handle
the ipg clock, because the peripheral clock comes from the master codec.
Only register the ipg clock and do not register the peripheral clock for ssi.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: stable@vger.kernel.org
SSI block has two types of clock:
ipg: bus clock, the clock needed for accessing registers.
per: peripheral clock, the clock needed for generating the bit rate.
Currently SSI driver only supports slave mode and only need to handle
the ipg clock, because the peripheral clock comes from the master codec.
Only register the ipg clock and do not register the peripheral clock for ssi.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: stable@vger.kernel.org
The __free_from_pool() function was changed in
e9da6e9905. Unfortunately, the test that
checks whether the provided (start,size) is within the DMA pool has
been improperly modified. It used to be:
if (start < coherent_head.vm_start || end > coherent_head.vm_end)
Where coherent_head.vm_end was non-inclusive (i.e, it did not include
the first byte after the pool). The test has been changed to:
if (start < pool->vaddr || start > pool->vaddr + pool->size)
So now pool->vaddr + pool->size is inclusive (i.e, it includes the
first byte after the pool), so the test should be >= instead of >.
This bug causes the following message when freeing the *first* DMA
coherent buffer that has been allocated, because its virtual address
is exactly equal to pool->vaddr + pool->size :
WARNING: at /home/thomas/projets/linux-2.6/arch/arm/mm/dma-mapping.c:463 __free_from_pool+0xa4/0xc0()
freeing wrong coherent size from pool
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Lior Amsalem <alior@marvell.com>
Cc: Maen Suleiman <maen@marvell.com>
Cc: Tawfik Bayouk <tawfik@marvell.com>
Cc: Shadi Ammouri <shadi@marvell.com>
Cc: Eran Ben-Avi <benavi@marvell.com>
Cc: Yehuda Yitschak <yehuday@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
[m.szyprowski: rebased onto v3.6-rc5 and resolved conflict]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
The delay functions may be called by some platforms between switching to
the timer-based delay loop but before calibration. In this case, the
initial loops_per_jiffy may not be suitable for the timer (although a
compromise may be achievable) and delay times may be considered too
inaccurate.
This patch updates loops_per_jiffy when switching to the timer-based
delay loop so that delays are consistent prior to calibration.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The user access functions may generate a fault, resulting in invocation
of a handler that may sleep.
This patch annotates the accessors with might_fault() so that we print a
warning if they are invoked from atomic context and help lockdep keep
track of mmap_sem.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The {get,put}_user macros don't perform range checking on the provided
__user address when !CPU_HAS_DOMAINS.
This patch reworks the out-of-line assembly accessors to check the user
address against a specified limit, returning -EFAULT if is is out of
range.
[will: changed get_user register allocation to match put_user]
[rmk: fixed building on older ARM architectures]
Reported-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Pull DMA-mapping fixes from Marek Szyprowski:
"Another set of fixes for ARM dma-mapping subsystem.
Commit e9da6e9905 replaced custom consistent buffer remapping code
with generic vmalloc areas. It however introduced some regressions
caused by limited support for allocations in atomic context. This
series contains fixes for those regressions.
For some subplatforms the default, pre-allocated pool for atomic
allocations turned out to be too small, so a function for setting its
size has been added.
Another set of patches adds support for atomic allocations to
IOMMU-aware DMA-mapping implementation.
The last part of this pull request contains two fixes for Contiguous
Memory Allocator, which relax too strict requirements."
* 'fixes-for-3.6' of git://git.linaro.org/people/mszyprowski/linux-dma-mapping:
ARM: dma-mapping: IOMMU allocates pages from atomic_pool with GFP_ATOMIC
ARM: dma-mapping: Introduce __atomic_get_pages() for __iommu_get_pages()
ARM: dma-mapping: Refactor out to introduce __in_atomic_pool
ARM: dma-mapping: atomic_pool with struct page **pages
ARM: Kirkwood: increase atomic coherent pool size
ARM: DMA-Mapping: print warning when atomic coherent allocation fails
ARM: DMA-Mapping: add function for setting coherent pool size from platform code
ARM: relax conditions required for enabling Contiguous Memory Allocator
mm: cma: fix alignment requirements for contiguous regions
Commit f447ed8b31 ("gpio: samsung: add flags specifier to
device-tree binding") adds a flag to represent active low state
for gpio line. Since gpio-keys on Origen board are active low,
using this flag to represent the same.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
file that affect booting on various omaps. Then some PM
related fixes for reset, sleep and wakeup.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJQSRZ+AAoJEBvUPslcq6VzEicQAI2LzTL+kKlYjiXHXJJjkFPJ
+3NJDw36thl4W9wA/tRyesqj8CDmpNRIZxoUtxeZqbDzn19erCiuEqLrmP9eAJdX
eYmuDwGaoM6yOom8LswbfvXlDCVlkK4BtYLXMbhkgcNWXMbpk52f357RHPh3bN3I
6Na2YwayB6cjmwRGXeWVEk+fDxPT+GbY3fsUZPg7BNZ14HdzEI+DOzfGJSO3cQPR
NY5FpLSmLMkCkulyuuuMSznLuLRxjHsRgBwtPSJltsytJAcFwWnXLY5DqtQXCoZw
vnltYP1QuUHXSTbXYGiU1nDd1ZBz3Z36g90/Xu3WeMUSh7rRzI38XUN3ouhbz3CP
hKYWLl1LtDilKdYVZTeZRL7afwBbueNYf0HRLqscM1ZO7Iv4dTiOcCOivOp5K6K0
OYX8Ac/Xyrd0J4Z9DVGkyMmGeLt6hOiEXr+rvm/3eKGZ2KuNenm0kyxhncYU810T
O0ygecCkU0LGmJEBUEac3pRP7uNlmEFgvB/B62tfaoTAdwUcWw8v044pAkhJyI+k
4KPP74Timohr0Bgqh0zhNi/ts3Ya9kFF7gPVK1aS+L6YHYy+oCmUcVVj5na/rvFo
9KgunUtTX2ljAgMp7oRevFtlF6izhNDMYvY+iHjkERDQf5isksOw9WhWacgnhvrm
cHV8QVMc6XLxo7Krk+4M
=fUO5
-----END PGP SIGNATURE-----
Merge tag 'omap-fixes-for-v3.6-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Fixes for timer, sram, memory corruption, and one board file that affect
booting on various omaps. Then some PM related fixes for reset, sleep
and wakeup.
* tag 'omap-fixes-for-v3.6-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP4: Fix array size for irq_target_cpu
ARM: OMAP4: hwmod data: temporarily comment out data for the sl2if IP block
ARM: OMAP: hwmod code: Disable module when hwmod enable fails
ARM: OMAP3: hwmod data: fix iva2 reset info
ARM: OMAP3xxx: clockdomain: fix software supervised wakeup/sleep
ARM: OMAP2+: am33xx: Fix the timer fck clock naming convention
ARM: OMAP: Config fix for omap3-touchbook board
ARM: OMAP: sram: skip the first 16K on OMAP3 HS
ARM: OMAP: sram: fix OMAP4 errata handling
ARM: OMAP: timer: obey the !CONFIG_OMAP_32K_TIMER
get_user may fail to load from the provided __user address due to an
unhandled fault generated by the access.
In the case of the undefined instruction trap, this results in failure
to load the faulting instruction, in which case we should send SIGILL to
the task rather than continue with potentially uninitialised data.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
It seems we were missing some text in the title for the
semihosting DEBUG_LL option. Add in the "/O" and fix up some
minor typos in the help text.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
'make dtbs' in a clean tree will try running the dtc before actually
building it. Make these rules depend upon the scripts to build it.
Cc: <stable@vger.kernel.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
During the p2v changes, the PHYS_OFFSET #define moved into a
!__ASSEMBLY__ section. This causes a XIP build to fail with
arch/arm/kernel/head.o: In function 'stext':
arch/arm/kernel/head.S:146: undefined reference to 'PHYS_OFFSET'
Momentarily leave the #ifndef __ASSEMBLY__ section so we can
define PHYS_OFFSET for all compilation units.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This enables support for Samsung and EXYNOS4 pinctrl driver for device
tree enabled EXYNOS4 platforms.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add pinctrl driver nodes for the three instances of pin controllers
in SAMSUNG EXYNOS4210 SoC and add the pin group nodes available in the
each of those three instances.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Pinctrl driver includes support for configuring the external wakeup
interrupts. On exynos platforms that use pinctrl driver, the setup
of wakeup interrupts in the exynos platform code can be skipped.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Test logs can be found here:
http://www.pwsan.com/omap/testlogs/omap_fixes_a_3.6rc/20120904110254/
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJQR3ZZAAoJEMePsQ0LvSpLRwwQAJ/tvZhDwhBZ2/2XIn+SWWrU
wS7MRkN+g3rsoQXjYI6n1BVCVj/qEpHpfZluaZy+09JrW2Db0pKtYGcJGF3U+TAb
RrqOS9r2PnLrmkIpsYfigXRtDvyYuMHP/eN4WpSZywVeY8xxs7azOrCN+0pGCUYA
DJ0ewAhini2SRGGcFqt7zXbkeOoPNGQZHpSChrN9m93fbqDqcJsk6mQ9H4Fd7oTm
JY72d9MmgkqaGsA2hmQA25KD3NFi6u8cu/31nu+gTMZbmOA0ZYmHP8fqEk/pSyBU
fPNIAnDs5RFYryntoQgVLQbOnhYYUIiuP+V2TBum44bG3sc0DEh4fBU/wDLNNy+H
JBQEirZ5DYqO0sELyXC1aZtbpu5rz/lHiYPQrMlA3NXQkQKOnRtyGHsv5MO3L45R
Gr+UyHq8nI8zB7kPIzxvlQ1mqzABUGmE8x8QlJy5PGbJW7naLaKzyUr7ULIvrekU
fxhKmFR3I1zpXRuN5bSX/95RDSfUEJpEVpBYuhOOaXBj+T2L3tkc5zH5vJZlX2/t
q3Qc0YXQ1/seToywVfJIqZGYceyeECdY1JCWeFwwdPBhQc8BPj/Dgor1Z460JRbg
aJ5PTPl8q9G2aiMaB3exQkQH09CB0ZJ0oWHhkiMyxGUxGsTesuTKfriWQ7/X31AR
GVLXEMQTvEPKJVSbiLdw
=R0kV
-----END PGP SIGNATURE-----
Merge tag 'omap-fixes-a-for-3.6rc' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into fixes
Some hwmod, clockdomain, am335x fixes against v3.6-rc4.
Test logs can be found here:
http://www.pwsan.com/omap/testlogs/omap_fixes_a_3.6rc/20120904110254/
Test-compiling obscure machines I notice that the gemini (which
by the way lacks a defconfig) is broken since some time back.
Adding a simple missing include makes it build again.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Two regression fixes and one boot-loader compatibility fix from Simon Horman.
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: armadillo800eva: enable rw rootfs mount
ARM: shmobile: mackerel: fixup usb module order
ARM: shmobile: armadillo800eva: fixup: sound card detection order
If NR_IRQS is less than MAX_IRQS, we end up writing past the
irq_target_cpu array in omap_wakeupgen_init():
/* Associate all the IRQs to boot CPU like GIC init does. */
for (i = 0; i < max_irqs; i++)
irq_target_cpu[i] = boot_cpu;
This can happen if SPARSE_IRQ is enabled as by default NR_IRQS is
set to 16. Without this patch we're overwriting other data during
the boot.
Looks like a similar fix was posted by Benoit Cousson earlier
as "ARM: OMAP2+: wakeupgen: Fix wrong array size for irq_target_cpu"
but was lost.
Cc: stable@vger.kernel.org
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The OMAP4 sl2if IP block requires some special programming for it to
enter idle. Without this programming, it will prevent the rest of
the chip from entering full chip idle.
This patch comments out the IP block data.
Later, once the appropriate support is available, this patch can be
reverted.
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Clock and module mode are explictly enable when hwmod is enabled. But if
the hwmod doesn't get ready on time, clocks are disabled but module is left
enabled.
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
IVA2 hwmod resets were missing the status bit offsets. Also, as the
hwmod itself didn't have prcm info at all, resetting iva hwmod was
accessing some bogus memory addresses. Added both infos to fix this.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Commit 4da71ae6 ("OMAP: clockdomain: Arch specific funcs for
clkdm_clk_enable/disable") called the OMAP2xxx-specific functions for
clockdomain wakeup and sleep. This would probably have broken
software-supervised clockdomain wakeup and sleep on OMAP3.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Jon Hunter <jon-hunter@ti.com>
Acked-by: Rajendra Nayak <rnayak@ti.com>
With commit ae6df418a2
Sub: ARM: OMAP2+: dmtimer: cleanup fclk usage)
The Timer functional clock naming convention has changed from
gptX_fck => timerXfck, and so as the timer init function
in mach-omap2/timer.c.
OMAP4 clocktree also has changed accordingly.
AM33xx Clock Tree has been merged during rc3-4 timeframe,
before above commit got merged, so similar change is required
for AM33xx as well (Change the gptX_fck => timerX_fck).
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
armadillo800eva default boot loader is "hermit",
and it's tag->u.core.flags has flag when kernel boots.
Because of this, ${LINUX}/arch/arm/kernel/setup.c :: parse_tag_core()
didn't remove MS_RDONLY flag from root_mountflags.
Thus, the rootfs is mounted as "readonly".
This patch adds "rw" kernel parameter,
and enable read/write mounts for rootfs
Cc: Masahiro Nakai <nakai@atmark-techno.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
