Commit Graph

5 Commits

Author SHA1 Message Date
Lennert Buytenhek
19cfd5c09f [ARM] Orion: rework MPP handling
Instead of having board code poke directly into the MPP configuration
registers, and separately calling orion5x_gpio_set_valid_pins() to
indicate which MPP pins can be used as GPIO pins, introduce a helper
function for configuring the roles of each of the MPP pins, and have
that helper function handle gpio validity internally.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Sylver Bruneau <sylver.bruneau@googlemail.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
2008-06-22 22:44:47 +02:00
Lennert Buytenhek
044f6c7c44 [ARM] Orion: move EHCI/I2C/UART peripheral init into board code
This patch moves initialisation of EHCI/I2C/UART platform devices
from the common orion5x_init() into the board support code.

The rationale behind this is that only the board support code knows
whether certain peripherals have been brought out on the board, and
not initialising peripherals that haven't been brought out is
desirable for example:
- to reduce user confusion (e.g. seeing both 'eth0' and 'eth1'
  appear while there is only one ethernet port on the board); and
- to allow for future power savings (peripherals that have not
  been brought out can be clock gated off entirely).

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
2008-06-22 22:44:45 +02:00
Lennert Buytenhek
d236f5a5f7 [ARM] Orion: use mv643xx_eth driver mbus window handling
Make the Orion 5x platform code use the mbus window handling code
that's in the mv643xx_eth driver, instead of programming the GigE
block's mbus window registers by hand.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-05-09 10:39:34 -04:00
Lennert Buytenhek
92b913b08b [ARM] Orion: fix ->map_irq() PCIe bus number check
The current orion5x board ->map_irq() routines check whether a
given bus number lives on the PCIe controller by comparing it with
the PCIe controller's primary bus number.  This doesn't work in
case there are multiple buses in the PCIe domain, i.e. if there
exists a PCIe bridge on the primary PCIe bus.

This patch adds a helper function (orion5x_pci_map_irq()) that
returns the IRQ number for the given PCI device if that device has
a hard-wired IRQ, or -1 otherwise, and makes each board's
->map_irq() function use this helper function.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-04-28 15:58:23 -04:00
Lennert Buytenhek
9dd0b194bf Orion: orion -> orion5x rename
Do a global s/orion/orion5x/ of the Orion 5x-specific bits (i.e.
not the plat-orion bits.)

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Acked-by: Saeed Bishara <saeed@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-03-27 14:51:41 -04:00