1429 Commits

Author SHA1 Message Date
David Brownell
6d16bfb5e8 i2c/tps65010: move header to <linux/i2c/...>
Move the tps65010 header file from the OMAP arch directory to the
more generic <linux/i2c/...> directory, and remove the spurious
dependency of this driver on OMAP.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
2008-01-27 18:14:49 +01:00
Adrian Bunk
7e8b99251b i2c: some overdue driver removal
This patch contains the overdue removal of three I2C drivers.

[JD: In fact only i2c-ixp4xx can be removed at the moment, the other two
platforms don't implement the generic GPIO layer yet.]

Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
2008-01-27 18:14:46 +01:00
Nicolas Pitre
796969104c ARM kprobes: special hook for the kprobes breakpoint handler
The kprobes code is already able to cope with reentrant probes, so its
handler must be called outside of the region protected by undef_lock.

If ever this lock is released when handlers are called then this commit
could be reverted.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-01-26 15:25:17 +00:00
Nicolas Pitre
785d3cd286 ARM kprobes: prevent some functions involved with kprobes from being probed
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-01-26 15:25:17 +00:00
Abhishek Sagar
24ba613c9d ARM kprobes: core code
This is a full implementation of Kprobes including Jprobes and
Kretprobes support.

This ARM implementation does not follow the usual kprobes double-
exception model. The traditional model is where the initial kprobes
breakpoint calls kprobe_handler(), which returns from exception to
execute the instruction in its original context, then immediately
re-enters after a second breakpoint (or single-stepping exception)
into post_kprobe_handler(), each time the probe is hit..  The ARM
implementation only executes one kprobes exception per hit, so no
post_kprobe_handler() phase. All side-effects from the kprobe'd
instruction are resolved before returning from the initial exception.
As a result, all instructions are _always_ effectively boosted
regardless of the type of instruction, and even regardless of whether
or not there is a post-handler for the probe.

Signed-off-by: Abhishek Sagar <sagar.abhishek@gmail.com>
Signed-off-by: Quentin Barnes <qbarnes@gmail.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-01-26 15:25:16 +00:00
Quentin Barnes
35aa1df432 ARM kprobes: instruction single-stepping support
This is the code implementing instruction single-stepping for kprobes
on ARM.

To get around the limitation of no Next-PC and no hardware single-
stepping, all kprobe'd instructions are split into three camps:
simulation, emulation, and rejected. "Simulated" instructions are
those instructions which behavior is reproduced by straight C code.
"Emulated" instructions are ones that are copied, slightly altered
and executed directly in the instruction slot to reproduce their
behavior.  "Rejected" instructions are ones that could be simulated,
but work hasn't been put into simulating them. These instructions
should be very rare, if not unencountered, in the kernel. If ever
needed, code could be added to simulate them.

One might wonder why this and the ptrace singlestep facility are not
sharing some code.  Both approaches are fundamentally different because
the ptrace code regains control after the stepped instruction by installing
a breakpoint after the instruction itself, and possibly at the location
where the instruction might be branching to, instead of simulating or
emulating the target instruction.

The ptrace approach isn't suitable for kprobes because the breakpoints
would have to be moved back, and the icache flushed, everytime the
probe is hit to let normal code execution resume, which would have a
significant performance impact. It is also racy on SMP since another
CPU could, with the right timing, sail through the probe point without
being caught.  Because ptrace single-stepping always result in a
different process to be scheduled, the concern for performance is much
less significant.

On the other hand, the kprobes approach isn't (currently) suitable for
ptrace because it has no provision for proper user space memory
protection and translation, and even if that was implemented, the gain
wouldn't be worth the added complexity in the ptrace path compared to
the current approach.

So, until kprobes does support user space, both kprobes and ptrace are
best kept independent and separate.

Signed-off-by: Quentin Barnes <qbarnes@gmail.com>
Signed-off-by: Abhishek Sagar <sagar.abhishek@gmail.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-01-26 15:25:16 +00:00
Russell King
7b5dea1234 [ARM] pxa: Add PXA3 standby code hooked into the IRQ wake scheme
Wakeup sources on PXA3 are enabled at two levels.  First, the MFP
configuration has to be set to enable which edges a specific pin
will trigger a wakeup.  The pin also has to be routed to a functional
unit.  Lastly, the functional unit must be enabled as a wakeup source
in the appropriate AD*ER registers (AD2D0ER for standby resume.)

This doesn't fit well with the IRQ wake scheme - we currently do a
best effort conversion from IRQ numbers to functional unit wake enable
bits.  For instance, there's several USB client related enable bits but
there's no corresponding IRQs to determine which you'd want.  Conversely,
there's a single enable bit covering several functional units.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:07:56 +00:00
eric miao
7f7c8a6192 [ARM] pxa: make MFP configuration processor independent
There are two reasons for making the MFP configuration to be processor
independent, i.e. removing the relationship of configuration bits with
actual MFPR register settings:

   1. power management sometimes requires the MFP to be configured
      differently when in run mode or in low power mode

   2. for future integration of pxa{25x,27x} GPIO configurations

The modifications include:

1. introducing of processor independent MFP configuration bits, as
   defined in [include/asm-arm/arch-pxa/mfp.h]:

	bit  0.. 9 - MFP Pin Number (1024 Pins Maximum)
	bit 10..12 - Alternate Function Selection
	bit 13..15 - Drive Strength
	bit 16..18 - Low Power Mode State
	bit 19..20 - Low Power Mode Edge Detection
	bit 21..22 - Run Mode Pull State
	and so on,

2. moving the processor dependent code from mfp.h into mfp-pxa3xx.h

3. cleaning up of the MFPR bit definitions

4. mapping of processor independent MFP configuration into processor
   specific MFPR register settings is now totally encapsulated within
   pxa3xx_mfp_config()

5. using of "unsigned long" instead of invented type of "mfp_cfg_t"
   according to Documentation/CodingStyle Chapter 5, usage of this
   in platform code will be slowly removed in later patches

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:07:56 +00:00
eric miao
0ad1fbc860 [ARM] pxa: remove un-used pxa3xx_mfp_set_xxx() functions
pxa3xx_mfp_set_xxx() functions are originally provided for overwriting
MFP configurations performed by pxa3xx_mfp_config(), the usage of such
a dirtry trick is not recommended, since there is currently no user of
these functions, they are safely removed

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:07:56 +00:00
eric miao
83b6759e72 [ARM] pxa: introduce a new file mfp-pxa3xx.h for common pin configurations
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:07:56 +00:00
Russell King
8785a8fbd5 [ARM] pxa: move memory controller registers into pxa2xx-regs.h
PXA3 has a different memory controller from PXA2 platforms.  Avoid
clashing definitions by moving the PXA2 definitions to pxa2xx-regs.h

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:07:54 +00:00
eric miao
88d456386c [ARM] pxa: make OHCI register definitions available to both pxa27x and pxa3xx
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:07:53 +00:00
Bridge Wu
5a1f21b1e5 [ARM] pxa: mmc: add 3rd host controller support for pxa310
This patch is to add the third mmc controller support _only_
for pxa310.

On zylonite, the third controller support one slot.

Signed-off-by: Bridge Wu <bridge.wu@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:07:53 +00:00
Bridge Wu
8d33b05581 [ARM] pxa: mmc: add 2nd host controller support for pxa3xx
This patch is to add the second mmc controller support for pxa3xx.
It's valid for pxa3[0|1|2]0.

On zylonite, the second controller has no slot.

Signed-off-by: Bridge Wu <bridge.wu@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:07:53 +00:00
Bridge Wu
fafc9d3fa3 [ARM] pxa: mmc: add 1st host controller support for pxa3xx
This patchis to add the first mmc controller support for pxa3xx.
It's valid for pxa3[0|1|2]0.

On zylonite, the first controller supports two slots, this patch
only support the first one right now.

Signed-off-by: Bridge Wu <bridge.wu@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:07:53 +00:00
Philipp Zabel
a333aeb73b [ARM] 4718/1: Fix redefinition warnings in PXA uncompressor code
FFUART and friends are already defined as __REG(x) in pxa-regs.h.
Instead of redefining them here, we can just provide the __REG macro.
Including asm/arch/hardware.h is not an option because this physical
addresses are needed here.
This is a fix for the compiler warnings generated by 4663/1.

Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Acked-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:07:52 +00:00
eric miao
2f1a74e5a2 [ARM] pxa: make pxa2xx_spi driver use ssp_request()/ssp_free()
1. make pxa2xx_spi.c use ssp_request() and ssp_free() to get the common
   information of the designated SSP port.

2. remove those IRQ/memory request code, ssp_request() has done that for
   the driver

3. the SPI platform device is thus made psuedo, no resource (memory/IRQ)
   has to be defined, all will be retreived by ssp_request()

4. introduce ssp_get_clk_div() to handle controller difference in clock
   divisor setting

5. use clk_xxx() API for clock enable/disable, and clk_get_rate() to
   handle the different SSP clock frequency between different processors

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:07:52 +00:00
eric miao
3dcb00ea58 [ARM] pxa: use __raw_writel()/__raw_readl() for ssp_xxxx()
1. change SSP register definitions from absolute virtual addresses to
   offsets

2. use __raw_writel()/__raw_readl() for functions of ssp_xxxx()

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:07:51 +00:00
eric miao
0aea1fd565 [ARM] pxa: move SSP register definitions from pxa-regs.h to regs-ssp.h
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:07:51 +00:00
eric miao
8828645046 [ARM] pxa: define "struct ssp_device" and add ssp_request()/ssp_free()
1. define "struct ssp_device" for SSP information, which is requested
   and released by function ssp_request()/ssp_free()

2. modify the ssp_init() and ssp_exit() to use the interface

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:07:51 +00:00
Philipp Zabel
49db76eb5f [ARM] 4663/1: Only putc uncompressor output into FFUART if it was enabled by the bootloader
Also, use existing register and bit definitions instead of numbers.

Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Acked-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:07:51 +00:00
Herbert Valerio Riedel
c9e3de941a [ARM] Orion: MV88F5181 support bits
add MV88F5181 support bits required by D-link DNS-323 patch

Signed-off-by: Herbert Valerio Riedel <hvr@gnu.org>
Acked-by: Tzachi Perelstein <tzachi@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:03:55 +00:00
Tzachi Perelstein
ca26f7d3ed [ARM] Orion: platform device registration for UART, USB and NAND
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:03:50 +00:00
Herbert Valerio Riedel
b11e9e020c [ARM] Orion: provide GPIO method for enabling hardware assisted blinking
This is a pre-requisite for implementing proper hardware accelerated
GPIO LED flashing, and since we want proper locking, it's sensible to provide
the orion specific orion_gpio_set_blink() implementation within
mach-orion/gpio.c. The functions orion_gpio_set_blink() and gpio_set_value()
implicitly turn off each others state.

Signed-off-by: Herbert Valerio Riedel <hvr@gnu.org>
Acked-by: Tzachi Perelstein <tzachi@marvell.com>
Acked-by: Nicolas Pitre <nico@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:03:46 +00:00
Tzachi Perelstein
01af72e4e3 [ARM] Orion: GPIO support
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Acked-by: David Brownell <david-b@pacbell.net>
2008-01-26 15:03:45 +00:00
Tzachi Perelstein
585cf17561 [ARM] basic support for the Marvell Orion SoC family
The Marvell Orion is a family of ARM SoCs with a DDR/DDR2 memory
controller, 10/100/1000 ethernet MAC, and USB 2.0 interfaces,
and, depending on the specific model, PCI-E interface, PCI-X
interface, SATA controllers, crypto unit, SPI interface, SDIO
interface, device bus, NAND controller, DMA engine and/or XOR
engine.

This contains the basic structure and architecture register definitions.

Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:03:42 +00:00
Assaf Hoffman
e50d64097b [ARM] Marvell Feroceon CPU core support
The Feroceon is a family of independent ARMv5TE compliant CPU core
implementations, supporting a variable depth pipeline and out-of-order
execution.  The Feroceon is configurable with VFP support, and the
later models in the series are superscalar with up to two instructions
per clock cycle.

This patch adds the initial low-level cache/TLB handling for this core.

Signed-off-by: Assaf Hoffman <hoffman@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:03:38 +00:00
Andrew Victor
2b3b3516b6 [ARM] 4764/1: [AT91] AT91CAP9 core support
Add support for Atmel's AT91CAP9 Customizable Microcontroller family.
  <http://www.atmel.com/products/AT91CAP/Default.asp>

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:01:13 +00:00
Andrew Victor
a04ff1af97 [ARM] 4758/1: [AT91] LEDs
Move the LED initialization code out of the various *_devices.c files,
and into leds.c.
Also add support for NEW_LEDs.

Patch from David Brownell.

Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:00:32 +00:00
Andrew Victor
c8f385a631 [ARM] 4757/1: [AT91] UART initialization
Modify the UART initialization to allow the board-initialization code
to specify which pins are connected, and which pins should therefore
be initialized.

The current at91_init_serial() will continue to work as-is, but is
marked as "deprecated" and will be removed once the board-specific
files has been updated to use the new interface.

As in the AVR32 code, we assume that the TX and RX pins will always be
initialized.

Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:00:32 +00:00
Andrew Victor
bfbc32663d [ARM] 4754/1: [AT91] SSC library support
Core support of the Atmel SSC library for all Atmel AT91 processors.

Based on David Brownell's initial patch for the AT91RM9200.

Signed-off-by: Andrew Victor <linux@maxim.org.za>
Acked-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:00:31 +00:00
Andrew Victor
884f5a6a8d [ARM] 4752/1: [AT91] RTT, RTC and WDT peripherals on SAM9
Add platform_device and initialization for the RTT (Real Time Timer)
and WDT (Watchdog) integrated in the Atmel AT91SAM9 processors.

For SAM9263, register both RTT peripherals.
   [From: David Brownell <dbrownell@users.sourceforge.net>]

Provide platform_resources for RTT peripherals
  [From: David Brownell <dbrownell@users.sourceforge.net>]

Add support for RTC peripheral on AT91SAM9RL (same RTC peripherals as
AT91RM9200)
  [From: David Brownell <dbrownell@users.sourceforge.net>]

Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:00:31 +00:00
Andrew Victor
e292080235 [ARM] 4751/1: [AT91] ISI peripheral on SAM9263
Add support for the Image Sensor Interface (ISI) peripheral integrated
in the Atmel AT91SAM9263 processor.

Patch from MaLiK

Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:00:31 +00:00
Marc Pignat
156864f806 [ARM] 4688/1: at91: speed-up irq processing
Save N instructions on every interrupt processing (where N is the
number of interrupts processed in any one IRQ exception).

Signed-off-by: Marc Pignat <marc.pignat@hevs.ch>
Acked-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:00:30 +00:00
Andrew Victor
9ebbec27da [ARM] 4657/1: AT91: Header definition update
Add definitions of registers / bits found on some AT91SAM9 processors

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:00:30 +00:00
Pavel Roskin
d2936b1976 [ARM] 4666/1: ixp4xx: fix sparse warnings in include/asm-arm/arch-ixp4xx/io.h
Don't lose __iomem in casts.  Use __force to cast __iomem addresses to
integers.  Use __force to cast u32 to __le32 and vice versa.

Signed-off-by: Pavel Roskin <proski@gnu.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 14:50:03 +00:00
Jan Altenberg
f1a6de9c7e [ARM] Remove at91_lcdc.h
include/asm-arm/arch-at91/at91_lcdc.h (which is still present in latest
git) has been superseeded by include/video/atmel_lcdc.h, so let's remove
it.

Signed-off-by: Jan Altenberg <jan.altenberg@linutronix.de>
Cc: Andrew Victor <andrew@sanpeople.com>
Cc: Nicolas Ferre <nicolas.ferre@rfo.atmel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 14:49:58 +00:00
Catalin Marinas
25ebee020b [ARM] 4583/1: ARMv7: Add VFPv3 support
This patch adds the support for VFPv3 (the kernel currently supports
VFPv2). The main difference is 32 double registers (compared to 16).

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 14:41:28 +00:00
Catalin Marinas
c98929c07a [ARM] 4582/2: Add support for the common VFP subarchitecture
This patch allows the VFP support code to run correctly on CPUs
compatible with the common VFP subarchitecture specification (Appendix
B in the ARM ARM v7-A and v7-R edition). It implements support for VFP
subarchitecture 2 while being backwards compatible with
subarchitecture 1.

On VFP subarchitecture 1, the arithmetic exceptions are asynchronous
(or imprecise as described in the old ARM ARM) unless the FPSCR.IXE
bit is 1. The exceptional instructions can be read from FPINST and
FPINST2 registers. With VFP subarchitecture 2, the arithmetic
exceptions can also be synchronous and marked by the FPEXC.DEX bit
(the FPEXC.EX bit is cleared). CPUs implementing the synchronous
arithmetic exceptions don't have the FPINST and FPINST2 registers and
accessing them would trigger and undefined exception.

Note that FPEXC.EX bit has an additional meaning on subarchitecture 1
- if it isn't set, there is no additional information in FPINST and
FPINST2 that needs to be saved at context switch or when lazy-loading
the VFP state of a different thread.

The patch also removes the clearing of the cumulative exception flags in
FPSCR when additional exceptions were raised. It is up to the user
application to clear these bits.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 14:41:28 +00:00
Arve Hjønnevåg
bfe645adf1 [ARM] msm: dma support for MSM7X00A
Signed-off-by: Brian Swetland <swetland@google.com>
2008-01-26 14:39:14 +00:00
Brian Swetland
3042102a28 [ARM] msm: core platform support for ARCH_MSM7X00A
- core header files for arch-msm
- Kconfig and Makefiles to enable ARCH_MSM7X00A builds
- MSM7X00A specific arch_idle
- peripheral iomap and irq number definitions

Signed-off-by: Brian Swetland <swetland@google.com>
2008-01-26 14:39:14 +00:00
Andrew Victor
20118ff978 [ARM] 4603/1: KS8695: debugfs interface to view pin state
This patch adds a debug interface (if CONFIG_DEBUG_FS is selected) to
display the basic configuration and current state of the GPIO pins on
the Kendin/Micrel KS8695 processor.

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 14:38:48 +00:00
Herbert Valerio Riedel
6331acd78f [ARM] 4671/1: ep93xx: remove obsolete gpio_line_* operations
With the new GPIO methods in place the old gpio_line_* methods are redundant,
so this patch finally removes the old legacy gpio_line_* wrappers.

Signed-off-by: Herbert Valerio Riedel <hvr@gnu.org>
Acked-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 14:37:31 +00:00
Herbert Valerio Riedel
7ca7225339 [ARM] 4669/1: ep93xx: simplify GPIO code and cleanups
This patch renumbers the (virtual) GPIO line numbering to have all
irq-capable gpio lines <= EP93XX_GPIO_LINE_MAX_IRQ by swapping the
port f range with the port c range; This simplifies code such as

 #define IRQ_EP93XX_GPIO(x)  (64 + (((x) + (((x) >> 2) & 8)) & 0x1f))

or

 if (line >= 0 && line < 16) {
    /* Port A/B */
 } else if (line >= 40 && line < 48) {
    /* Port F */
 }

considerably; in addition to the renumbering this patch also
introduces macro constants EP93XX_GPIO_LINE_MAX_IRQ and
EP93XX_GPIO_LINE_MAX, and replaces most magic numbers by those and
invocations of gpio_to_irq()/irq_to_gpio().

Signed-off-by: Herbert Valerio Riedel <hvr@gnu.org>
Acked-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 14:37:31 +00:00
Herbert Valerio Riedel
4e9f9fd514 [ARM] 4668/1: ep93xx: implement new GPIO API
Implement new GPIO API for ep93xx platform as defined in Documentation/gpio.txt
and provide transitional __deprecated wrappers for the previous gpio_line_*
functions.

Signed-off-by: Herbert Valerio Riedel <hvr@gnu.org>
Acked-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 14:37:31 +00:00
Dmitry Baryshkov
93e9012f40 Input: add Tosa keyboard driver
Add keyboard support on tosa (Sharp Zaurus SL-6000x).
Largely based on patches by Dirk Opfer.

Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
2008-01-21 01:11:07 -05:00
Russell King
198a6d5a61 [ARM] pxa: silence warnings from cpu_is_xxx() macros
If only a single CPU type is selected, __cpu_is_xxx() doesn't
use its argument.  This causes the compiler to issue a warning
about an unused variable in the parent function.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-10 12:33:54 +00:00
Russell King
1265edb8fd Merge branch 'pxa-fixes' 2007-12-08 14:41:29 +00:00
Michael Brunner
03d14a5536 [ARM] 4690/1: PXA: fix CKEN corruption in PXA27x AC97 cold reset code
Fix CKEN register corruption in the PXA27x cold reset code
located in sound/arm/pxa27x-ac97.c. The problem has been
introduced with a pxa_set_cken() function change in linux 2.6.23.
This patch is based on patch 4527/1 that fixes the same problem in
the ASoC PXA-AC97 driver. Additionally a definition for the CKEN
index value is added and applied to both PXA AC97 drivers.

Signed-off-by: Michael Brunner <mibru@gmx.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-12-08 14:36:06 +00:00
Linus Torvalds
b62c855938 Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] 4680/1: parentheses around NR_IRQS definition
  [ARM] 4679/1: AT91: Change maintainer email address
  [ARM] 4675/1: pxa: fix mfp address definition error for pxa320
  [ARM] 4674/1: pxa: increase LCD PCLK drive strength to fast 2mA for PXA300/PXA310
  [ARM] 4673/1: pxa: add missing IRQ_SSP4 definitions for PXA3xx
  [ARM] 4672/1: pxa: fix DRCMR(n) to support PXA27x and later processors
  [ARM] 4665/1: fix __und_usr wrt accessing the undefined insn in user space
  [ARM] 4659/1: remove possibilities for spurious false negative with __kuser_cmpxchg
  [ARM] 4661/1: fix do_undefinstr wrt the enabling of IRQs
  [ARM] uengine: fix memset size error
  [ARM] 4648/1: i.MX/MX1 ensure more complete AITC initialization
  [ARM] 4611/2: AT91: Fix GPIO buttons pins on SAM9261-EK.
  [ARM] 4650/1: AT91: New-style init of I2C, support for i2c-gpio
  [ARM] 4604/2: AT91: Master clock divistor on SAM9
  [ARM] 4662/1: Fix PXA serial driver compilation if SERIAL_PXA_CONSOLE is disabled
  [ARM] PXA ssp: unlock when ssp tries to close an invalid port
  [ARM] 4654/1: pxa: update default MFP register value
  [ARM] 4653/1: pxa: fix a gpio typo in mfp-pxa320.h
  [ARM] 4652/1: pxa: fix a typo of pxa27x usb host clk definition
  [ARM] 4651/1: pxa: add PXA3xx specific IRQ definitions
2007-11-30 08:11:18 -08:00