83083 Commits

Author SHA1 Message Date
Max Filippov
895666a992 xtensa: disable IRQs while IRQ handler is running
IRQ handlers are expected to run with IRQs disabled.
See e.g. http://lwn.net/Articles/380931/ for a longer story.

This was overlooked in the commit
  2d1c645 xtensa: dispatch medium-priority interrupts
Revert to old behavior and simplify interrupt entry and exit code.
Interrupt handler still honours IRQ priority.

do_notify_resume/schedule must be called with interrupts enabled, enable
interrupts if we return from user exception.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09 01:07:11 -07:00
Max Filippov
8f371c7521 xtensa: enable lockdep support
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09 01:07:11 -07:00
Max Filippov
031d0112d7 xtensa: fix arch_irqs_disabled_flags implementation
IRQs are disabled when PS.EXCM is set or PS.INTLEVEL is equal to or
higher than LOCKLEVEL.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09 01:07:11 -07:00
Max Filippov
c92931b200 xtensa: add irq flags trace support
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09 01:07:11 -07:00
Max Filippov
3ae908c99e xtensa: provide custom CALLER_ADDR* implementations
Definition of CALLER_ADDR* through __builtin_return_address makes
compiler insert calls to __xtensa_libgcc_window_spill, which in turn
makes fast_syscall_spill_registers syscall that clobbers registers when
called from the kernel mode, leading to invalid opcode exceptions on
return to userspace.

Provide definition for CALLER_ADDR0 as MAKE_PC_FROM_RA(a0, a1) and in
case CONFIG_FRAME_POINTER is enabled extract CALLER_ADDR{1-3} from
stack.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09 01:07:10 -07:00
Max Filippov
3e4196a5cc xtensa: add stacktrace support
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09 01:07:10 -07:00
Max Filippov
4e96274e2b xtensa: clean up stpill_registers
- remove unused asm parameters;
- fix EXCM bit setting in the PS SR during _spill_registers call.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09 01:07:10 -07:00
Max Filippov
f4b93ba931 xtensa: don't use a7 in simcalls
To support FRAME_POINTER avoid using a7 in __simc (none of the existing
simcalls needs it). Replace calls to __simc with more specific
simc_read, simc_write and simc_lseek calls.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09 01:07:10 -07:00
Max Filippov
0f7f931027 xtensa: don't attempt to use unconfigured timers
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09 01:07:10 -07:00
Max Filippov
b06c14e5c1 xtensa: provide default platform_pcibios_init implementation
This fixes the following build error:

  arch/xtensa/kernel/built-in.o:(.init.literal+0xe8): undefined reference
	to `platform_pcibios_init'
  arch/xtensa/kernel/built-in.o: In function `setup_arch':
  (.init.text+0x20e): undefined reference to `platform_pcibios_init'

and allows platform to omit definition of platform_pcibios_init if it's
empty.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09 01:07:09 -07:00
Paul Bolle
5e44fd012b xtensa: remove KCORE_ELF again
The Kconfig symbol KCORE_ELF was removed in v2.6.0, but reappeared in two
architectures. It is useless. Remove it again.

Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09 01:07:09 -07:00
Max Filippov
e85e335f8f xtensa: add MMU v3 support
MMUv3 comes out of reset with identity vaddr -> paddr mapping in the TLB
way 6:

Way 6 (512 MB)
        Vaddr       Paddr       ASID  Attr RWX Cache
        ----------  ----------  ----  ---- --- -------
        0x00000000  0x00000000  0x01  0x03 RWX Bypass
        0x20000000  0x20000000  0x01  0x03 RWX Bypass
        0x40000000  0x40000000  0x01  0x03 RWX Bypass
        0x60000000  0x60000000  0x01  0x03 RWX Bypass
        0x80000000  0x80000000  0x01  0x03 RWX Bypass
        0xa0000000  0xa0000000  0x01  0x03 RWX Bypass
        0xc0000000  0xc0000000  0x01  0x03 RWX Bypass
        0xe0000000  0xe0000000  0x01  0x03 RWX Bypass

This patch adds remapping code at the reset vector or at the kernel
_start (depending on CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX) that
reconfigures MMUv3 as MMUv2:

Way 5 (128 MB)
        Vaddr       Paddr       ASID  Attr RWX Cache
        ----------  ----------  ----  ---- --- -------
        0xd0000000  0x00000000  0x01  0x07 RWX WB
        0xd8000000  0x00000000  0x01  0x03 RWX Bypass
Way 6 (256 MB)
        Vaddr       Paddr       ASID  Attr RWX Cache
        ----------  ----------  ----  ---- --- -------
        0xe0000000  0xf0000000  0x01  0x07 RWX WB
        0xf0000000  0xf0000000  0x01  0x03 RWX Bypass

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09 01:07:09 -07:00
Max Filippov
d83ff0bb82 xtensa: fix ibreakenable register update
Only set the register when there is at least one ibreak register,
otherwise the build fails:
	arch/xtensa/kernel/head.S:105: Error: invalid register 'ibreakenable'
	for 'wsr' instruction
	arch/xtensa/platforms/iss/setup.c:67: Error: invalid register
	'ibreakenable' for 'wsr' instruction

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09 01:07:09 -07:00
Max Filippov
74f5bf029e xtensa: fix oprofile building as module
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09 01:07:09 -07:00
Michal Simek
f663b60f52 microblaze: Fix uaccess_ok macro
Fix access_ok macro no to permit
case where user will try to access
the last address space which is equal
to segment address.

Example:
segment addr = 0xbfff ffff
address = 0xbfff fff0
size = 0x10

Current wrong implementation
0xbfff ffff >= (0xbfff fff0 | 0x10 | (0xbfff fff0 + 0x10))
0xbfff ffff >= (0xbfff fff0        | 0xc000 0000)
0xbfff ffff >= 0xf000 0000
return 0 which is access failed even the combination is valid.
because get_fs().seq returns the last valid address.

This patch fix this problem.

Size equals to zero is valid access.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-05-09 09:04:32 +02:00
Michal Simek
6dc92c9c3f microblaze: Add support for new cpu versions and target architecture
Update PVR values based on reference manual.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-05-09 09:04:31 +02:00
Michal Simek
08aaefa0df microblaze: Do not select OPT_LIB_ASM by default
This option is valid only for BE systems.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-05-09 09:04:31 +02:00
Michal Simek
5eec2f0228 microblaze: Fix initrd support
Initrd/ramdisk support has been never validated.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-05-09 09:04:31 +02:00
Michal Simek
4323cd48a1 microblaze: Do not use r6 in head.S
r6 stores pointer to ramdisk and shouldn't
be used before it is passed to machine_early_init.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-05-09 09:01:21 +02:00
Michal Simek
ef9cb4e19b microblaze: pci: Remove duplicated header
Remove duplicated header.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-05-09 09:01:21 +02:00
Dan Christensen
7c2c85137f microblaze: Set the default irq_domain
Register the irq_domain created during initialization as the default so
that device drivers can pass NULL to irq_create_mapping and get a
virtual irq to pass to request_irq.

Signed-off-by: Dan Christensen <opello@opello.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-05-09 09:01:21 +02:00
Wei Yongjun
995fb054eb microblaze: pci: Remove duplicated include from pci-common.c
Remove duplicated include.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-05-09 09:01:21 +02:00
Gleb Natapov
8d76c49e9f KVM: VMX: fix halt emulation while emulating invalid guest sate
The invalid guest state emulation loop does not check halt_request
which causes 100% cpu loop while guest is in halt and in invalid
state, but more serious issue is that this leaves halt_request set, so
random instruction emulated by vm86 #GP exit can be interpreted
as halt which causes guest hang. Fix both problems by handling
halt_request in emulation loop.

Reported-by: Tomas Papan <tomas.papan@gmail.com>
Tested-by: Tomas Papan <tomas.papan@gmail.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
CC: stable@vger.kernel.org
Signed-off-by: Gleb Natapov <gleb@redhat.com>
2013-05-09 09:04:56 +03:00
Steven Miao
5b0830914a blackfin: smp: fix smp build after drop asm/system.h
Signed-off-by: Steven Miao <realmz6@gmail.com>
2013-05-09 13:08:45 +08:00
James Cosin
352030530c blackfin: fix bootup core clock and system clock display
From: James Cosin <jkosin@intcomgrp.com>

fixes the number of digits to 6 after the decimal point to regain the
significant 0s in the frequency after the decimal point.

Signed-off-by: Steven Miao <realmz6@gmail.com>
2013-05-09 13:03:32 +08:00
Tony Lindgren
d5a2b34fdd ARM: dts: Configure and fix the McSPI pins for 4430sdp
The bootloader configures the pins, but has pull bits
set without pull enable bits. While this is harmless,
and won't do anything, it seems to cause confusion at
least for me every time looking at the pin configuration.
Fix it for DT based boot.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08 17:17:05 -07:00
Philip Avinash
e45879ec26 ARM: dts: AM33XX: Add GPMC node
Add GPMC data node to AM33XX device tree file.

Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08 17:17:05 -07:00
Nishanth Menon
45465c5e59 ARM: dts: OMAP4460: Fix CPU OPP voltages
commit d16fb25 (ARM: dts: OMAP4460: Add CPU OPP table)
introduced wrong OPP voltages per OPP by mistake. Sync the OPP
tables with existing OMAP4460 OPP data in
arch/arm/mach-omap2/opp4xxx_data.c

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08 17:17:05 -07:00
Nishanth Menon
e011cf69c6 ARM: dts: OMAP36xx: Fix CPU OPP voltages
commit 3027e26 (ARM: dts: OMAP36xx: Add CPU OPP table)
introduced wrong OPP voltages per OPP by mistake. Sync the OPP
tables with existing OMAP36xx OPP data in
arch/arm/mach-omap2/opp3xxx_data.c

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08 17:17:05 -07:00
Peter Ujfalusi
827897c05c ARM: OMAP4+: omap2plus_defconfig: Enable audio via TWL6040 as module
Boards supported upstream all use TWL6040 as audio codec, enable the common
ASoC machine driver by default for them.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08 17:07:40 -07:00
Vaibhav Hiremath
d240ef3056 ARM: OMAP2: AM33XX: id: Add support for new AM335x PG2.1 Si
Add support for chip id detection of AM335x PG2.1 Silicon.

Currently omap3xxx_check_revision() detects PG1.0 and PG2.0 only,
this patch extends it by adding PG2.1 Si support.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08 17:07:40 -07:00
Christoph Fritz
27b105bb99 omap: mux: add AM/DM37x gpios
This patch adds GPIO pins found on AM/DM37x.

Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08 17:07:40 -07:00
Tony Lindgren
a8a07fffe4 Merge branch 'omap-gpmc-fixes-for-v3.10' of git://github.com/jonhunter/linux into fixes 2013-05-08 17:06:39 -07:00
Wei Yongjun
348c34225d ARM: OMAP1: DMA: fix error handling in omap1_system_dma_init()
Add the missing iounmap() before return from omap1_system_dma_init()
in the error handling case.
Also removed platform_device_del() on add resources error case which
cause dup device delete.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08 16:48:02 -07:00
Kevin Hilman
e7e17c5386 ARM: OMAP2+: omap_device: use late_initcall_sync
If DEBUG_LL and earlyprintk are enabled, and omap-serial.c is compiled
as a module, the kernel boot hangs early as the clocks for serial port
are cut while earlyprintk still uses the port.

The problem is a race between the late_initcall for omap_device (which
idles devices that have no drivers) and the late_initcall in
kernel/printk.c which turns off the earlyconsole.   Any printks
that happen between this omap_device late initcall and the earlyconsole
late initcall will crash when accessing the UART.

The fix is to ensure the omap_device initcall happens after the
earlyconsole initcall.

Reported-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08 16:48:01 -07:00
Aaro Koskinen
e65f131a14 ARM: OMAP: RX-51: change probe order of touchscreen and panel SPI devices
Commit 9fdca9df (spi: omap2-mcspi: convert to module_platform_driver)
broke the SPI display/panel driver probe on RX-51/N900. The exact cause is
not fully understood, but it seems to be related to the probe order. SPI
communication to the panel driver (spi1.2) fails unless the touchscreen
(spi1.0) has been probed/initialized before. When the omap2-mcspi driver
was converted to a platform driver, it resulted in that the devices are
probed immediately after the board registers them in the order they are
listed in the board file.

Fix the issue by moving the touchscreen before the panel in the SPI
device list.

The patch fixes the following failure:

[    1.260955] acx565akm spi1.2: invalid display ID
[    1.265899] panel-acx565akm display0: acx_panel_probe panel detect error
[    1.273071] omapdss CORE error: driver probe failed: -19

Tested-by: Sebastian Reichel <sre@debian.org>
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Pali Rohár <pali.rohar@gmail.com>
Cc: Joni Lapilainen <joni.lapilainen@gmail.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Felipe Balbi <balbi@ti.com>
Cc: stable@vger.kernel.org
Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08 16:48:00 -07:00
Roger Quadros
cf7dd65811 ARM: OMAP3: Beagle: Fix USB Host on beagle xM Ax/Bx
On Beagle xM Rev. Ax/Bx, the USB power enable GPIO logic is
reversed when compared to other revisions i.e. it is
active high instead of active low.

Use the beagle_config.usb_pwr_level flag correctly so that
the power regulator can be configured at runtime.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08 16:48:00 -07:00
Linus Torvalds
3d15b798ea - Since drivers/irqchip/irq-gic.c no longer has dependencies on arm32
specifics (the 'gic' branch merged), it can be enabled on arm64.
 - Enable arm64 support for poweroff/restart (for code under
   drivers/power/reset/).
 - Fixes (dts file, exception handling, bitops)
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Merge tag 'arm64-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64

Pull arm64 update from Catalin Marinas:

 - Since drivers/irqchip/irq-gic.c no longer has dependencies on arm32
   specifics (the 'gic' branch merged), it can be enabled on arm64.

 - Enable arm64 support for poweroff/restart (for code under
   drivers/power/reset/).

 - Fixes (dts file, exception handling, bitops)

* tag 'arm64-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64:
  arm64: Treat the bitops index argument as an 'int'
  arm64: Ignore the 'write' ESR flag on cache maintenance faults
  arm64: dts: fix #address-cells for foundation-v8
  arm64: vexpress: Add support for poweroff/restart
  arm64: Enable support for the ARM GIC interrupt controller
2013-05-08 15:15:27 -07:00
Linus Torvalds
246e6a0d78 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rkuo/linux-hexagon-kernel
Pull Hexagon fixes from Richard Kuo:
 "A bug fix and a Kconfig cleanup"

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rkuo/linux-hexagon-kernel:
  HEXAGON: Remove non existent reference to GENERIC_KERNEL_EXECVE & GENERIC_KERNEL_THREAD
  Hexagon: fix register used to call do_work_pending
2013-05-08 15:08:59 -07:00
Jon Hunter
e60f18d6bc ARM: dts: OMAP4: Fix ethernet IRQ for OMAP4 boards
Commit ff5c9059 (ARM: dts: OMAP3+: Correct gpio #interrupts-cells
property) updated the number of interrupt cells required for configuring
gpios as interrupts for other devices (such as ethernet controllers).
This update allowed the interrupt type (edge, level, etc) to be
configured via device-tree (as described in the
Documentation/devicetree/bindings/gpio/gpio-omap.txt).

This broke ethernet support on the OMAP4 SDP board that defines a gpio
as the ethernet IRQ because the interrupt type (level, edge, etc) was
not getting configured correctly. This board use the ks8851 ethernet
chip which has an active low interrupt. Fix this by defining the gpio
interrupt as active-low in the device-tree binding.

Please note that the OMAP4-VAR-SOM also uses the same ethernet
controller and it is expected it will have the same problem. So the
same fix is also applied to this board.

Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-08 15:03:35 -07:00
Zhenzhong Duan
4ea9b9aca9 xen: mask x2APIC feature in PV
On x2apic enabled pvm, doing sysrq+l, got NULL pointer dereference as below.

    SysRq : Show backtrace of all active CPUs
    BUG: unable to handle kernel NULL pointer dereference at           (null)
    IP: [<ffffffff8125e3cb>] memcpy+0xb/0x120
    Call Trace:
     [<ffffffff81039633>] ? __x2apic_send_IPI_mask+0x73/0x160
     [<ffffffff8103973e>] x2apic_send_IPI_all+0x1e/0x20
     [<ffffffff8103498c>] arch_trigger_all_cpu_backtrace+0x6c/0xb0
     [<ffffffff81501be4>] ? _raw_spin_lock_irqsave+0x34/0x50
     [<ffffffff8131654e>] sysrq_handle_showallcpus+0xe/0x10
     [<ffffffff8131616d>] __handle_sysrq+0x7d/0x140
     [<ffffffff81316230>] ? __handle_sysrq+0x140/0x140
     [<ffffffff81316287>] write_sysrq_trigger+0x57/0x60
     [<ffffffff811ca996>] proc_reg_write+0x86/0xc0
     [<ffffffff8116dd8e>] vfs_write+0xce/0x190
     [<ffffffff8116e3e5>] sys_write+0x55/0x90
     [<ffffffff8150a242>] system_call_fastpath+0x16/0x1b

That's because apic points to apic_x2apic_cluster or apic_x2apic_phys
but the basic element like cpumask isn't initialized.

Mask x2APIC feature in pvm to avoid overwrite of apic pointer,
update commit message per Konrad's suggestion.

Signed-off-by: Zhenzhong Duan <zhenzhong.duan@oracle.com>
Tested-by: Tamon Shiose <tamon.shiose@oracle.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2013-05-08 08:38:11 -04:00
Konrad Rzeszutek Wilk
cb91f8f44c xen/spinlock: Fix check from greater than to be also be greater or equal to.
During review of git commit cb9c6f15f318aa3aeb62fe525aa5c6dcf6eee159
("xen/spinlock:  Check against default value of -1 for IRQ line.")
Stefano pointed out a bug in the patch. Unfortunatly due to vacation
timing the fix was not applied and this patch fixes it up.

Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2013-05-08 08:38:09 -04:00
Konrad Rzeszutek Wilk
d5b17dbff8 xen/smp/pvhvm: Don't point per_cpu(xen_vpcu, 33 and larger) to shared_info
As it will point to some data, but not event channel data (the
shared_info has an array limited to 32).

This means that for PVHVM guests with more than 32 VCPUs without
the usage of VCPUOP_register_info any interrupts to VCPUs
larger than 32 would have gone unnoticed during early bootup.

That is OK, as during early bootup, in smp_init we end up calling
the hotplug mechanism (xen_hvm_cpu_notify) which makes the
VCPUOP_register_vcpu_info call for all VCPUs and we can receive
interrupts on VCPUs 33 and further.

This is just a cleanup.

Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2013-05-08 08:38:08 -04:00
Steven J. Hill
f6b06d9361 MIPS: microMIPS: Support dynamic ASID sizing.
Changes for pure microMIPS cores to dynamically determine the ASID
size at boot time.

Includes bug fix https://patchwork.linux-mips.org/patch/5230/

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
2013-05-08 12:30:10 +02:00
Steven J. Hill
d532f3d267 MIPS: Allow ASID size to be determined at boot time.
Original patch by Ralf Baechle and removed by Harold Koerfgen
with commit f67e4ffc79905482c3b9b8c8dd65197bac7eb508. This
allows for more generic kernels since the size of the ASID
and corresponding masks can be determined at run-time. This
patch is also required for the new Aptiv cores and has been
tested on Malta and Malta Aptiv platforms.

[ralf@linux-mips.org: Added relevant part of fix
https://patchwork.linux-mips.org/patch/5213/]

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08 12:30:10 +02:00
Steven J. Hill
49bffbdc88 MIPS: FW: malta: Code formatting clean-ups.
Clean-up code according to the 'checkpatch.pl' script.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08 12:30:10 +02:00
Steven J. Hill
270690e00c MIPS: FW: Remove obsolete header file for MTI platforms.
Remove 'arch/mips/include/asm/mips-boards/prom.h' and get rid of
all inclusions of it by Malta and SEAD-3 platforms.

[ralf@linux-mips.org: Fold in John Crispin <blogic@openwrt.org>'s "MIPS:
ar7 powertv build"].

[ralf@linux-mips.org: Fold in John Crispin <blogic@openwrt.org>'s "MIPS:
unbreak powertv build"].

[ralf@linux-mips.org: Test. Build. Your. Fscking. Code. Or...]

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08 12:30:10 +02:00
Steven J. Hill
b431f09d55 MIPS: FW: malta: Use new common FW library variable processing.
Remove old YAMON prom code and use common firmware library code.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08 12:30:09 +02:00
Steven J. Hill
0be2abbcee MIPS: FW: sead3: Use new common FW library variable processing.
Remove old YAMON prom code and use common firmware library code.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08 12:30:09 +02:00
Steven J. Hill
14aecdd419 MIPS: FW: Add environment variable processing.
Add parsing of the environment and command line variables passed to
the kernel to the firmware library.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08 12:30:09 +02:00