2277 Commits

Author SHA1 Message Date
Axel Lin
ee73b4c6e3 spi: coldfire-qspi: Fix getting correct address for *mcfqspi
dev_get_drvdata() returns the address of master rather than mcfqspi.

Fixes: af361079 (spi/coldfire-qspi: Drop extra calls to spi_master_get in suspend/resume functions)
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org
2014-03-05 11:53:08 +08:00
Axel Lin
017145fef5 spi: fsl-dspi: Fix getting correct address for master
Current code set platform drvdata to dspi. However, the code in dspi_suspend()
and dspi_resume() assumes the drvdata is the address of master.
Fix it by setting platform drvdata to master.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org
2014-03-05 11:51:02 +08:00
Wenyou Yang
5bdfd491a0 spi: atmel: adopt pinctrl support
Amend the spi atmel pin controller to optionally take a pin control
handle and set the state of the pins to:

- "default" on boot, resume and before performing an spitransfer
- "sleep" on suspend()

This should make it possible to optimize energy usage for the pins
both for the suspend/resume cycle

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-05 11:21:47 +08:00
Atsushi Nemoto
6ea312936d spi: core: make zero length transfer valid again
Zero length transfer becomes invalid since
"spi: core: Validate length of the transfers in message" commit,
but it should be valid to support an odd device, for example, which
requires long delay between chipselect and the first transfer, etc.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-04 11:22:09 +08:00
Axel Lin
af348519e4 spi: xcomm: Remove duplicate code to set default bits_per_word and max speed
In the implementation of __spi_validate(), spi core will set transfer
bits_per_word and max speed as spi device default if it is not set for
this transfer. So we can remove the same logic in spi_xcomm_setup_transfer().
Also remove a redundant code to initialize is_first variable.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-04 11:19:14 +08:00
Axel Lin
743a46b89a spi: sun6i: Set bits_per_word_mask to only support 8 bits word length
This controller only supports 8 bits word length.
Set bits_per_word_mask so spi core will reject transfers that attempt to use
an unsupported bits_per_word value.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-04 11:08:06 +08:00
Axel Lin
ba47644d5b spi: sun4i: Set bits_per_word_mask to only support 8 bits word length
This controller only supports 8 bits word length.
Set bits_per_word_mask so spi core will reject transfers that attempt to use
an unsupported bits_per_word value.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-04 11:08:05 +08:00
Gabor Juhos
61d1cf163c spi: spi-ath79: fix initial GPIO CS line setup
The 'ath79_spi_setup_cs' function initializes the chip
select line of a given SPI device in order to make sure
that the device is inactive.

If the SPI_CS_HIGH bit is set for a given device, it
means that the CS line of that device is active HIGH
so it must be set to LOW initially. In case of GPIO
CS lines, the 'ath79_spi_setup_cs' function does the
opposite of that due to the wrong GPIO flags.

Fix the code to use the correct GPIO flags.

Reported-by: Ronald Wahl <ronald.wahl@raritan.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org
2014-03-03 12:38:52 +08:00
Axel Lin
765ee709eb spi: dw: Convert to let spi core validate transfer speed
Set master->max_speed_hz then spi core will handle checking transfer speed.
So we can remove the same checking in this driver.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-03 12:35:27 +08:00
Axel Lin
ad6f33d22c spi: atmel: Let spi core handle validating transfer length
spi core will handle validating transfer length since commit 4d94bd21b333
"spi: core: Validate length of the transfers in message".
So remove the same checking in this driver.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-03 12:01:28 +08:00
Axel Lin
7984b5ca5c spi: octeon: Convert to let spi core validate transfer speed
Set master->max_speed_hz then spi core will handle checking transfer speed.
The behavior is different from current code when the speed_hz is greater than
the maximum transfer speed supported by the controller.
Unless there is other good reason, I think we had better make the behavior
consistent with what spi core does.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-03 11:59:45 +08:00
Axel Lin
85fe414d32 spi: octeon: Remove struct octeon_spi_setup usage
Current code uses struct octeon_spi_setup to store max_speed_hz, chip_select and
mode settings of current spi device.
We can always get the same settings in octeon_spi_do_transfer() by msg->spi.
So this patch removes struct octeon_spi_setup and octeon_spi_setup,
octeon_spi_cleanup functions.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-03 11:59:45 +08:00
Axel Lin
790fc55a77 spi: omap-uwire: Convert to use bits_per_word_mask
Set bits_per_word_mask so spi core will reject transfers that attempt to use
an unsupported bits_per_word value.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-03 11:58:29 +08:00
Axel Lin
0e6d873ac4 spi: atmel: Remove redundant list_empty checking
This checking is already done in __spi_validate().

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-03 11:56:16 +08:00
Qipan Li
eeb7139524 spi: sirf: provide a shortcut for spi command-data mode
there are many SPI clients which use the following protocal:
step 1: send command bytes to clients(rx buffer is empty)
step 2: send data bytes to clients or receive data bytes from
clients.
SiRFprimaII provides a shortcut for this kind of SPI transfer.
when tx buf is less or equal than 4 bytes and rx buf is null
in a transfer, we think it as 'command' data and use hardware
command register for the transfer.
here we can save some CPU loading than doing both tx and rx
for a normal transfer.

Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-03 11:22:20 +08:00
Axel Lin
b141586032 spi: sh-msiof: Kill sh_msiof_spi_bits and sh_msiof_spi_hz functions
In the implementation of __spi_validate(), spi core will set transfer
bits_per_word and max speed as spi device default if it is not set for
this transfer. So we can remove the same implementation in this driver.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-03 10:46:42 +09:00
Axel Lin
e428a42007 spi: sh-hspi: Remove duplicate code to set default transfer speed
In the implementation of __spi_validate(), spi core will use spi device's max
speed as default transfer speed if it is not set for this transfer.
So we can remove the same logic in hspi_hw_setup().

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-03 10:37:46 +09:00
Axel Lin
cd2ac0c0cd spi: orion: Let spi core handle validating transfer length
spi core will handle validating transfer length since commit 4d94bd21b333
"spi: core: Validate length of the transfers in message".
So remove the same checking in this driver.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-01 13:51:56 +09:00
Axel Lin
f8c717a567 spi: txx9: Let spi core handle validating transfer length
spi core will handle validating transfer length since commit 4d94bd21b333
"spi: core: Validate length of the transfers in message".
So remove the same checking in this driver.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-01 13:50:56 +09:00
Jingoo Han
7bdadd8d94 spi: txx9: Use devm_ioremap_resource()
Use devm_ioremap_resource() in order to make the code simpler,
and remove redundant return value check of platform_get_resource()
because the value is checked by devm_ioremap_resource().

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Reviewed-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-28 15:17:52 +09:00
Philippe De Muyter
fd40dccb1a spi: spi-imx: spi_imx_remove: do not disable disabled clocks
Currently, at module removal, one gets the following warnings:
------------[ cut here ]------------
WARNING: at drivers/clk/clk.c:780 clk_disable+0x18/0x24()
Modules linked in: spi_imx(-) [last unloaded: ev76c560]
CPU: 1 PID: 16337 Comm: rmmod Tainted: G        W    3.10.17-80548-g90191eb-dirty #33
[<80013b4c>] (unwind_backtrace+0x0/0xf8) from [<800115dc>] (show_stack+0x10/0x14)
[<800115dc>] (show_stack+0x10/0x14) from [<800257b8>] (warn_slowpath_common+0x4c/0x68)
[<800257b8>] (warn_slowpath_common+0x4c/0x68) from [<800257f0>] (warn_slowpath_null+0x1c/0x24)
[<800257f0>] (warn_slowpath_null+0x1c/0x24) from [<803f60ec>] (clk_disable+0x18/0x24)
[<803f60ec>] (clk_disable+0x18/0x24) from [<7f02c9cc>] (spi_imx_remove+0x54/0x9c [spi_imx])
[<7f02c9cc>] (spi_imx_remove+0x54/0x9c [spi_imx]) from [<8025868c>] (platform_drv_remove+0x18/0x1c)
[<8025868c>] (platform_drv_remove+0x18/0x1c) from [<80256f60>] (__device_release_driver+0x70/0xcc)
[<80256f60>] (__device_release_driver+0x70/0xcc) from [<80257770>] (driver_detach+0xcc/0xd0)
[<80257770>] (driver_detach+0xcc/0xd0) from [<80256d90>] (bus_remove_driver+0x7c/0xc0)
[<80256d90>] (bus_remove_driver+0x7c/0xc0) from [<80068668>] (SyS_delete_module+0x144/0x1f8)
[<80068668>] (SyS_delete_module+0x144/0x1f8) from [<8000e080>] (ret_fast_syscall+0x0/0x30)
---[ end trace 1f5df9ad54996300 ]---
------------[ cut here ]------------
WARNING: at drivers/clk/clk.c:780 clk_disable+0x18/0x24()
Modules linked in: spi_imx(-) [last unloaded: ev76c560]
CPU: 1 PID: 16337 Comm: rmmod Tainted: G        W    3.10.17-80548-g90191eb-dirty #33
[<80013b4c>] (unwind_backtrace+0x0/0xf8) from [<800115dc>] (show_stack+0x10/0x14)
[<800115dc>] (show_stack+0x10/0x14) from [<800257b8>] (warn_slowpath_common+0x4c/0x68)
[<800257b8>] (warn_slowpath_common+0x4c/0x68) from [<800257f0>] (warn_slowpath_null+0x1c/0x24)
[<800257f0>] (warn_slowpath_null+0x1c/0x24) from [<803f60ec>] (clk_disable+0x18/0x24)
[<803f60ec>] (clk_disable+0x18/0x24) from [<7f02c9e8>] (spi_imx_remove+0x70/0x9c [spi_imx])
[<7f02c9e8>] (spi_imx_remove+0x70/0x9c [spi_imx]) from [<8025868c>] (platform_drv_remove+0x18/0x1c)
[<8025868c>] (platform_drv_remove+0x18/0x1c) from [<80256f60>] (__device_release_driver+0x70/0xcc)
[<80256f60>] (__device_release_driver+0x70/0xcc) from [<80257770>] (driver_detach+0xcc/0xd0)
[<80257770>] (driver_detach+0xcc/0xd0) from [<80256d90>] (bus_remove_driver+0x7c/0xc0)
[<80256d90>] (bus_remove_driver+0x7c/0xc0) from [<80068668>] (SyS_delete_module+0x144/0x1f8)
[<80068668>] (SyS_delete_module+0x144/0x1f8) from [<8000e080>] (ret_fast_syscall+0x0/0x30)
---[ end trace 1f5df9ad54996301 ]---

Since commit 9e556dcc55774c9a1032f32baa0e5cfafede8b70, "spi: spi-imx: only
enable the clocks when we start to transfer a message", clocks are always
disabled except when transmitting messages.  There is thus no need to
disable them at module removal.

Fixes: 9e556dcc55774 (spi: spi-imx: only enable the clocks when we start to transfer a message)
Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Acked-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org
2014-02-28 15:14:54 +09:00
Axel Lin
80d68ca5a5 spi: sh-hspi: Remove hspi_cleanup function
hspi_cleanup() is doing nothing except print a non-useful debug message,
so remove it.  Also remove unused hspi2info macro.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-27 20:08:51 +09:00
Geert Uytterhoeven
1bd6363bc0 spi: sh-msiof: Use core message handling instead of spi-bitbang
The only remaining feature of spi-bitbang used by this driver is the
chipselect() callback, which just does conditional GPIO.
This is handled fine by the SPI core's spi_set_cs(), hence switch the
driver to use the core message handling through our own transfer_one()
method.

As the (optional) GPIO CS is no longer deasserted at spi_master.setup()
time (through spi_bitbang_setup() and the spi_bitbang.chipselect()
callback), we now have to take care of that ourselves.

Remove the call to spi_master_put() in sh_msiof_spi_remove(), as our SPI
master is now registered using devm_spi_register_master()
(spi_bitbang_start() uses the non-managed version).

Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-27 19:44:04 +09:00
Geert Uytterhoeven
2416289c71 spi: sh-msiof: Convert to let spi core validate xfer->bits_per_word
Set bits_per_word_mask so the spi core will reject transfers that attempt
to use an unsupported bits_per_word value.

Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-27 19:44:03 +09:00
Geert Uytterhoeven
c833ff7304 spi: sh-msiof: Move clock management to (un)prepare_message()
Move clock management and pin configuration from the bitbang chipselect()
method to the SPI core prepare_message() and unprepare_message() methods.

As spi_master.{,un}prepare_message() is guaranteed to be called in
matching pairs, the clock management synchronization is no longer needed.

As sh_msiof_spi_set_pin_regs() is no longer called at spi_master.setup()
time (through spi_bitbang_setup() and the spi_bitbang.chipselect()
callback), we now have to take care of that ourselves.

Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-27 19:44:03 +09:00
Geert Uytterhoeven
beb74bb087 spi: sh-msiof: Add support for R-Car H2 and M2
Add support for the MSIOF variant in the R-Car H2 (r8a7790) and M2
(r8a7791) SoCs.

Binding documentation:
  - Add future-proof "renesas,msiof-<soctype>" compatible values,
  - The default for "renesas,rx-fifo-size" is 256 on R-Car H2 and M2,
  - "renesas,tx-fifo-size" and "renesas,rx-fifo-size" are deprecated for
    soctype-specific bindings,
  - Add example bindings.

Implementation:
  - MSIOF on R-Car H2 and M2 requires the transmission of dummy data if
    data is being received only (cfr. "Set SICTR.TSCKE to 1" and "Write
    dummy transmission data to SITFDR" in paragraph "Transmit and Receive
    Procedures" of the Hardware User's Manual).
  - As RX depends on TX, MSIOF on R-Car H2 and M2 also lacks the RSCR
    register (Receive Clock Select Register), and some bits in the RMDR1
    (Receive Mode Register 1) and TMDR2 (Transmit Mode Register 2)
    registers.
  - Use the recently introduced SPI_MASTER_MUST_TX flag to enable support
    for dummy transmission in the SPI core, and to differentiate from other
    MSIOF implementations in code paths that need this.
  - New DT compatible values ("renesas,msiof-r8a7790" and
    "renesas,msiof-r8a7791") are added, as well as new platform device
    names ("spi_r8a7790_msiof" and "spi_r8a7791_msiof").
  - The default RX FIFO size is 256 words on R-Car H2 and M2.

This is loosely based on a set of patches from Takashi Yoshii
<takasi-y@ops.dti.ne.jp>.

Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-27 19:44:02 +09:00
Geert Uytterhoeven
50a7e23f53 spi: sh-msiof: Move default FIFO sizes to device ID data
As different variants of MSIOF have different FIFO sizes, move the default
FIFO sizes to a new struct sh_msiof_chipdata, pointed to from the device
ID data.

[Moved ifdef to fix build -- broonie]

Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-27 19:43:27 +09:00
Geert Uytterhoeven
32d3b2d1dd spi: sh-msiof: Improve bindings
Documentation:
  - Add missing "interrupt-parent", "#address-cells", "#size-cells", and
    "clocks" properties,
  - Add missing default values for "num-cs", "renesas,tx-fifo-size" and
    "renesas,rx-fifo-size",
  - Add a reference to the pinctrl documentation.

Implementation:
  - As "num-cs" is marked optional, provide a sensible default.

Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-27 19:33:47 +09:00
Mark Brown
4867147bcd Merge branch 'topic/dma' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into HEAD 2014-02-27 18:54:00 +09:00
Geert Uytterhoeven
dc64d39b54 spi: spidev: Add support for Dual/Quad SPI Transfers
Add support for Dual/Quad SPI Transfers to the spidev API.
As this uses SPI mode bits that don't fit in a single byte, two new
ioctls (SPI_IOC_RD_MODE32 and SPI_IOC_WR_MODE32) are introduced.

Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-27 13:51:29 +09:00
Geert Uytterhoeven
e6456186ca spi: spidev: Restore all SPI mode flags on ioctl failure
In commit f477b7fb13df2b843997559ff34e87d054ba6538 ("spi: DUAL and QUAD
support"), spi_device.mode was enlarged from 8 to 16 bits.

However, the spidev code still only saved 8 bits of data. If a spidev
SPI_IOC_WR_MODE or SPI_IOC_WR_LSB_FIRST request failed, only the lower 8
bits of the SPI mode were restored, inadvertently clearing the upper 8
bits, possibly disabling Quad or Dual SPI transfers for the device.

Save up to 32 bits to fix this.

For SPI_IOC_WR_MODE this is probably not so important, as it doesn't allow
setting Quad or Dual mode anyway, but SPI_IOC_WR_LSB_FIRST is used to just
set or clear a single bit.

Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-27 13:50:33 +09:00
Jingoo Han
71aa2e3207 spi: sirf: Use SIMPLE_DEV_PM_OPS macro
Use SIMPLE_DEV_PM_OPS macro in order to make the code simpler.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-27 13:40:59 +09:00
Jingoo Han
6ff8672a96 spi: xilinx: remove unnecessary spaces
Remove unnecessary space in order to fix the following
checkpatch issues.

  WARNING: Unnecessary space after function pointer name

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Reviewed-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-27 13:40:07 +09:00
Alexander Stein
7995d74ab2 spi-topcliff-pch: Fix probing when DMA mode is used
If during registering SPI master due to SPI device probing a SPI transfer
is issued the DMA buffers are not allocated yet.

This fixes the following oops:
pch_spi 0000:02:0c.1: enabling device (0000 -> 0002)
pch_spi 0000:02:0c.1: master is unqueued, this is deprecated
BUG: unable to handle kernel NULL pointer dereference at   (null)
IP: [<c125aa05>] pch_spi_handle_dma+0x15c/0x6f4
[...]

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-27 13:37:10 +09:00
Axel Lin
00cce74d08 spi: qup: Get rid of using struct spi_qup_device
Current code uses struct spi_qup_device to store spi->mode and spi->chip_select
settings. We can get these settings in spi_qup_transfer_one and spi_qup_set_cs
without using struct spi_qup_device. Refactor the code a bit to remove
spi_qup_setup(), spi_qup_cleanup(), and struct spi_qup_device.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Tested-by: Ivan T. Ivanov <iivanov@mm-sol.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-26 08:54:54 +09:00
Axel Lin
382ab20e81 spi: s3c64xx: Let spi core handle validating transfer length
spi core will handle validating transfer length since commit 4d94bd21b333
"spi: core: Validate length of the transfers in message".
So remove the same checking in this driver.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-25 21:27:12 +09:00
Axel Lin
83f091440d spi: qup: Remove module version
The module version is unlikely to be updated, use kernel version should be
enough.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Ivan T. Ivanov <iivanov@mm-sol.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-24 22:04:45 +09:00
Axel Lin
80faf90f97 spi: qup: Depend on ARM && COMPILE_TEST to avoid build error
This driver uses writel_relaxed() which does not exist in x86, ppc, etc.
Make it depend on ARM && COMPILE_TEST to avoid below build error:

  CC [M]  drivers/spi/spi-qup.o
drivers/spi/spi-qup.c: In function 'spi_qup_set_state':
drivers/spi/spi-qup.c:180:3: error: implicit declaration of function 'writel_relaxed' [-Werror=implicit-function-declaration]
cc1: some warnings being treated as errors
make[2]: *** [drivers/spi/spi-qup.o] Error 1
make[1]: *** [drivers/spi] Error 2
make: *** [drivers] Error 2

Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-24 14:44:57 +09:00
Qipan Li
facffed297 spi: sirf: use SET_SYSTEM_SLEEP_PM_OPS to initialize PM entries
use SET_SYSTEM_SLEEP_PM_OPS to initialize PM entries, this makes the codes
clean and also enable the ability of hibernation support for sirf SPI.

Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-24 11:01:14 +09:00
Barry Song
dd7243d6a5 spi: sirf: move to use generic dma dt-binding
sirf-dma driver enabled generic dt binding for dma channels.
see here we remove self-defined dma channel prop and move to
use generic dma_request_slave_channel.
related changes in dts is something like:
    dmas = <&dmac1 9>,
    <&dmac1 4>;
    dma-names = "rx", "tx";

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-24 11:01:14 +09:00
Axel Lin
702d3cf9d0 spi: qup: Enable driver compilation with COMPILE_TEST
This helps increasing build testing coverage.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23 14:39:06 +09:00
Axel Lin
f0ceb114ae spi: qup: Fix build error due to a typo
Fix below build error when CONFIG_PM_RUNTIME=y:

C [M]  drivers/spi/spi-qup.o
drivers/spi/spi-qup.c: In function 'spi_qup_pm_suspend_runtime':
drivers/spi/spi-qup.c:712:12: error: 'QUP_CLOCK_AUTO_GATE' undeclared (first use in this function)
drivers/spi/spi-qup.c:712:12: note: each undeclared identifier is reported only once for each function it appears in
drivers/spi/spi-qup.c: In function 'spi_qup_pm_resume_runtime':
drivers/spi/spi-qup.c:725:13: error: 'QUP_CLOCK_AUTO_GATE' undeclared (first use in this function)
make[2]: *** [drivers/spi/spi-qup.o] Error 1
make[1]: *** [drivers/spi] Error 2
make: *** [drivers] Error 2

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23 14:39:06 +09:00
Axel Lin
f97b26b05b spi: core: Replace msleep with usleep_range to get more accurate sleep time
Fixes below checkpatch warning:
WARNING: msleep < 20ms can sleep for up to 20ms; see Documentation/timers/timers-howto.txt
+               msleep(10);

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23 13:39:35 +09:00
Axel Lin
f734394d86 spi: fsl-spi: Convert to let spi core validate xfer->bits_per_word
Set bits_per_word_mask so spi core will reject transfers that attempt to use
an unsupported bits_per_word value.

fsl_spi_grlib_probe() may update mpc8xxx_spi->max_bits_per_word setting.
So set master->bits_per_word_mask after fsl_spi_grlib_probe().

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23 13:14:39 +09:00
Axel Lin
9bf46f6df5 spi: xilinx: Convert to let spi core validate bits_per_word
Set bits_per_word_mask so spi core will reject transfers that attempt to use
an unsupported bits_per_word value.

spi_bitbang requires custom setup_transfer() to be defined if there is a
custom txrx_bufs(). Thus keep the empty xilinx_spi_setup_transfer() function
in the code.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23 12:53:21 +09:00
Axel Lin
23e2c2aa45 spi: Use list_last_entry at appropriate places
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23 12:47:07 +09:00
Axel Lin
4522193698 spi: sh-hspi: Convert to let spi core validate bits_per_word
Set bits_per_word_mask so spi core will reject transfers that attempt to use
an unsupported bits_per_word value.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23 12:44:49 +09:00
Axel Lin
cb64ca5407 spi: qup: Convert ot let spi core handle checking transfer speed
Set master->max_speed_hz then spi core will handle checking transfer speed.
So we can remove the same checking in this driver.

Also remove checking spi->chip_select in spi_qup_setup(), the checking is done
by spi core.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Ivan T. Ivanov <iivanov@mm-sol.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23 12:28:28 +09:00
Axel Lin
81b045fe72 spi: qup: Remove spi_master_put in spi_qup_remove
This driver uses devm_spi_register_master() so don't explicitly call
spi_master_put() in spi_qup_remove().

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Ivan T. Ivanov <iivanov@mm-sol.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23 12:28:18 +09:00
Geert Uytterhoeven
ba824d4971 spi: rspi: Fix loopback mode for Dual/Quad SPI Transfers
While normal Dual and Quad SPI Transfers are unidirectional, we must do
a bidirectional transfer if loopback mode is enabled, else rx_buf is not
filled.

With spidev it seemed to work, as spidev uses the same buffer for
tranmission and reception.

Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23 12:27:03 +09:00