This patch fixes the following section mismatches:
<-- snip -->
...
WARNING: drivers/ata/built-in.o(.text+0x15072): Section mismatch in reference from the function piix_init_one() to the function .devinit.text:piix_init_sata_map()
WARNING: drivers/ata/built-in.o(.text+0x150dd): Section mismatch in reference from the function piix_init_one() to the function .devinit.text:piix_init_pcs()
WARNING: drivers/ata/built-in.o(.text+0x150e5): Section mismatch in reference from the function piix_init_one() to the function .devinit.text:piix_init_sidpr()
WARNING: drivers/ata/built-in.o(.text+0x15107): Section mismatch in reference from the function piix_init_one() to the function .devinit.text:piix_check_450nx_errata()
...
<-- snip -->
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
This patch adds the Intel ICH10 IDE mode SATA Controller DeviceID's.
Signed-off-by: Jason Gaston <jason.d.gaston@intel.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
For ICH8, SCRs can be accessed using index and data register pair
located at BAR 5. This patch implements support for it such that PHY
status, errors and hardreset are available for those controllers.
This is the only case where two devices on a PATA channel have access
to SCRs and creates a unique problem of mapping two SCRs to one link.
Note that this is different from PMP case in that they aren't quite
separate links - e.g. softreset resets both devices.
This problem is worked around by merging the SCR values. To upper
layer, it looks like there is a single link with one set of SCRs but
with two devices. This works well enough for PHY event, error
reporting and hardreset.
Supporting hardreset is important because in rare cases SATA devices
fail to recover without it after PHY errors.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
ata_piix requires more configuration during initialization than most
other SFF compliant controllers and one-go initialzation with
ata_pci_one() is too rigid.
This patch converts ata_piix to use two step prepare - activate
initialization used by other more advanced controllers. This
conversion brings the happy side effect of enabling PCI device before
accessing PCI configuration registers. Other than that, there
shouldn't be any behavior change.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Kill PIIX_FLAG_SCR, PIIX_PORT_ENABLED and PIIX_PORT_PRESENT. These
are unused.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Separate controller IDs into a separate enum as Jeff requested.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Add Toshiba Satellite R20 and Tecra M6 to broken suspend list. Matt
Piermarini reported and provided the M6 patch. This is from OSDL bug 7780.
Signed-off-by: Peter Schwenke <peter@bluetoad.com.au>
Cc: Matt Piermarini <mattpiermarini@yahoo.com>
Acked-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Add Toshiba Tecra M4 to broken suspend list. This is from OSDL
bugzilla bug 7780.
Signed-off-by: Peter Schwenke <peter@bluetoad.com.au>
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Add more toshiba laptops to broken suspend list. This is from OSDL
bugzilla bug 7780.
tj: re-formatted patch and added description and SOB.
Signed-off-by: Peter Schwenke <peter@bluetoad.com.au>
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
ICH8 and 9 use two SFF controllers to show 6 SATA ports. The first
controllre hosts the first 4 ports while the second one hosts the last
2. The PCS register of the first controller encompasses the first
four ports or all six ports depending on configuration while PCS of
the second controller controls the last two ports. Using 0xf for the
first controller and 0x3 for the second controller always result in
the correct configuration.
Signed-off-by: Tejun Heo <htejun@gmail.com>
ICH8M on apple macbook pro occasionally locks up completely during PCS
initialization if ports other than the first one are enabled. Add a
separate controller ID and only enable the first port.
tj: commit description added and patch updated to fit with the
previous controller ID update.
Signed-off-by: Thomas Rohwer <tr@tng.de>
Signed-off-by: Tejun Heo <htejun@gmail.com>
Move piix_pata_mwdma to top, rename ich9_2port_sata to ich8_2port_sata
for consistency and use automatically incremented values instead of
assigning fixed values to ease adding new controller IDs.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Satellite U205 has alternate product name where the satellite part is
all capatalized. Add it to the blacklist.
This is reported by Ross Patterson in kernel bugzilla bug #7780.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Ross Patterson <me@rpatterson.net>
Please warmly welcome the PRO variant of Satellite U200 to the broken
suspend list.
Original patch is from Yann Chachkoff. Patch reformatted and
forwarded by Tejun Heo.
Signed-off-by: Yann Chachkoff <yann.chachkoff@myrealbox.com>
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Keeping the list in sync with the old IDE driver
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Tackle the relatively sane complaints of checkpatch --file.
The vast majority is indentation and whitespace changes, the rest are
* #include fixes
* printk KERN_xxx prefix addition
* BSS/initializer cleanups
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This patch adds a port map for ICH9 and ICH8 SATA controllers that have only 2 ports available in that mode.
Signed-off-by: Jason Gaston <jason.d.gaston@intel.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
This patch removes some incorrect formatting spaces and replaces them with tabs.
Signed-off-by: Jason Gaston <jason.d.gaston@intel.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
It was always set to ata_port_disable(). Removed the hook, and replaced
the very few ap->ops->port_disable() callsites with direct calls to
ata_port_disable().
Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ->irq_ack() is redundant to what the irq handler already
performs... chk-status + irq-clear. Furthermore, it is only
called in one place, when screaming-irq-debugging is enabled,
so we don't want to bother with a hook just for that.
* ata_dummy_irq_on() is only ever used in drivers that have
no callpath reaching ->irq_on(). Remove .irq_on hook from
those drivers, and the now-unused ata_dummy_irq_on()
Signed-off-by: Jeff Garzik <jeff@garzik.org>
There is another outstanding issue with ata_piix.c. Intel has never
officially supported anything faster than PATA 100MB/s.
But, the ata_piix.c driver "define" the ICH5 & ICH7 as UDMA6 (aka 133MB/s)
capable. [ Well, no one has probably noticed it before, because there is bug
in do_pata_set_dmamode... Just look at
libata_atapiix_enable_real_udma133.patch and you'll see what wrong with it. ]
Here are Intel's datasheets for the affected chipsets: ICH5 Datasheet:
http://www.intel.com/design/chipsets/datashts/252516.htm (See note on page
183: "... the ICH5 supports reads at the maximum rate of 100MB/s.")
ICH7 Datasheet: http://www.intel.com/design/chipsets/datashts/307013.htm (See
first note on page 190: "... the ICH7 supports reads at the maximum rate of
100MB/s.")
They are two different ways to deal with it:
- Either -
1. replace all ich_pata_133 with ich_pata_100.
(libata_atapiix_disable_udma6.diff - diff from 2.6.22 )
- Or -
2. keep all ich_pata_133 and fix the bug in "do_pata_set_dmamode".
(libata_atapiix_enable_real_udma133.patch - diff from 2.6.22) If there are
any concerns about the safety of the patch patch:
http://lkml.org/lkml/2007/7/6/292 (It was already tested by an Intel
employee, but I guess a bit more user input is necessary here... )
This patch implements 1.
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Jeff Garzik <jeff@garzik.org>
Cc: Tejun Heo <htejun@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@web.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Make reset methods and related functions deal with ata_link instead of
ata_port.
* ata_do_reset()
* ata_eh_reset()
* all prereset/reset/postreset methods and related functions
This patch introduces no behavior change.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Three main sets of changes:
1) dmi_get_system_info() return value should have been marked const,
since callers should not be changing that data.
2) const-ify DMI internals, since DMI firmware tables should,
whenever possible, be marked const to ensure we never ever write to
that data area.
3) const-ify DMI API, to enable marking tables const where possible
in low-level drivers.
And if we're really lucky, this might enable some additional
optimizations on the part of the compiler.
The bulk of the changes are #2 and #3, which are interrelated. #1 could
have been a separate patch, but it was so small compared to the others,
it was easier to roll it into this changeset.
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
There's a different version of DMI table for TECRA M3 where it has
proper vendor and product name entry. Add the entry to the broken
suspend list.
Angus Turnbull reported and provided initial patch.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Angus Turnbull <angus@twinhelix.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Some notebooks need bit18 of IOCFG to be cleared for the drive bay to
work even though the bit is NOOP according to the datasheet. This
patch implement IOCFG bit18 quirk and apply it to Clevo M570U.
http://bugzilla.kernel.org/show_bug.cgi?id=8051
Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: D. Angelis <dangelis@beta-cae.gr>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Satellite U200 also shares the problem. Add it to the broken suspend
list. Original patch from John Schember.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: John Schember <john@nachtimwald.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Resend trying to remove 8-bit characters in the email.
This patch adds the Intel Tolapai IDE mode SATA controller DID's.
Signed-off-by: Jason Gaston <jason.d.gaston@intel.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Add TECRA M7 to broken suspend list. Reported by Marie Koreen.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Marie Koreen <kbug@koreen.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Add Tecra M3 to the broken suspend blacklist. Tecra M3 doesn't have
proper DMI_PRODUCT_NAME but has an OEM_STRING instead. Match it.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Separate out broken suspend blacklist matching into
piix_broken_suspend().
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
ACPI implementations in several TOSHIBA laptops are weird and burn cpu
cycles for tens of seconds while trying to suspend if the PCI device
for the ATA controller is disabled when the ACPI suspend is called.
This patch uses DMI to match those machines and bypass device disable
on those machines during suspend. As the device needs to be put into
enabled state on resume without affecting PCI enable count, matching
resume callback uses __pci_reenable_device().
This bug is reported in bugzilla bug 7780.
http://bugzilla.kernel.org/show_bug.cgi?id=7780
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (34 commits)
PCI: Only build PCI syscalls on architectures that want them
PCI: limit pci_get_bus_and_slot to domain 0
PCI: hotplug: acpiphp: avoid acpiphp "cannot get bridge info" PCI hotplug failure
PCI: hotplug: acpiphp: remove hot plug parameter write to PCI host bridge
PCI: hotplug: acpiphp: fix slot poweroff problem on systems without _PS3
PCI: hotplug: pciehp: wait for 1 second after power off slot
PCI: pci_set_power_state(): check for PM capabilities earlier
PCI: cpci_hotplug: Convert to use the kthread API
PCI: add pci_try_set_mwi
PCI: pcie: remove SPIN_LOCK_UNLOCKED
PCI: ROUND_UP macro cleanup in drivers/pci
PCI: remove pci_dac_dma_... APIs
PCI: pci-x-pci-express-read-control-interfaces cleanups
PCI: Fix typo in include/linux/pci.h
PCI: pci_ids, remove double or more empty lines
PCI: pci_ids, add atheros and 3com_2 vendors
PCI: pci_ids, reorder some entries
PCI: i386: traps, change VENDOR to DEVICE
PCI: ATM: lanai, change VENDOR to DEVICE
PCI: Change all drivers to use pci_device->revision
...
The last two slots of MAP 00b of ich6m was incorrectly marked as
reserved. This is left over from converting the entry to allow 00b.
This causes no real problem. It only makes the driver print annoying
warning message. Fix it.
[patch also proferred by Pierre Tardy at the end of 2006 -jg]
Signed-off-by: Tejun Heo <htejun@gmail.com>
--
drivers/ata/ata_piix.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Instead of all drivers reading pci config space to get the revision
ID, they can now use the pci_device->revision member.
This exposes some issues where drivers where reading a word or a dword
for the revision number, and adding useless error-handling around the
read. Some drivers even just read it for no purpose of all.
In devices where the revision ID is being copied over and used in what
appears to be the equivalent of hotpath, I have left the copy code
and the cached copy as not to influence the driver's performance.
Compile tested with make all{yes,mod}config on x86_64 and i386.
Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Acked-by: Dave Jones <davej@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
The ATA_UDMAx masks are self-documenting, and far better than manually
writing in the hex mask.
Note that pata_it8213 mask differed from the comment. Added a FIXME there.
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Fix various bugs in pio/mwdma mode programming.
* Control bits in the timing register wasn't cleared properly while
programming PIO mode.
* MWDMA mode programming cleared the wrong part of control bits.
* MWDMA mode programming cleared udma_mask even when the controller
doesn't support UDMA.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Art Haas <ahaas@airmail.net>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Acer Aspire 2023WLMi uses short 40c cable. Add quirk for it.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Steve H. <mail.pandor@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
With cable methods in place we don't need a custom error handler for SATA
so get rid of it
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
