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1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
844 lines
29 KiB
C
844 lines
29 KiB
C
/*
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* $Id: pmc551.c,v 1.30 2005/01/05 18:05:13 dwmw2 Exp $
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*
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* PMC551 PCI Mezzanine Ram Device
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*
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* Author:
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* Mark Ferrell <mferrell@mvista.com>
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* Copyright 1999,2000 Nortel Networks
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*
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* License:
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* As part of this driver was derived from the slram.c driver it
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* falls under the same license, which is GNU General Public
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* License v2
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*
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* Description:
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* This driver is intended to support the PMC551 PCI Ram device
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* from Ramix Inc. The PMC551 is a PMC Mezzanine module for
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* cPCI embedded systems. The device contains a single SROM
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* that initially programs the V370PDC chipset onboard the
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* device, and various banks of DRAM/SDRAM onboard. This driver
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* implements this PCI Ram device as an MTD (Memory Technology
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* Device) so that it can be used to hold a file system, or for
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* added swap space in embedded systems. Since the memory on
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* this board isn't as fast as main memory we do not try to hook
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* it into main memory as that would simply reduce performance
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* on the system. Using it as a block device allows us to use
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* it as high speed swap or for a high speed disk device of some
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* sort. Which becomes very useful on diskless systems in the
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* embedded market I might add.
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*
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* Notes:
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* Due to what I assume is more buggy SROM, the 64M PMC551 I
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* have available claims that all 4 of it's DRAM banks have 64M
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* of ram configured (making a grand total of 256M onboard).
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* This is slightly annoying since the BAR0 size reflects the
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* aperture size, not the dram size, and the V370PDC supplies no
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* other method for memory size discovery. This problem is
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* mostly only relevant when compiled as a module, as the
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* unloading of the module with an aperture size smaller then
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* the ram will cause the driver to detect the onboard memory
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* size to be equal to the aperture size when the module is
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* reloaded. Soooo, to help, the module supports an msize
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* option to allow the specification of the onboard memory, and
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* an asize option, to allow the specification of the aperture
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* size. The aperture must be equal to or less then the memory
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* size, the driver will correct this if you screw it up. This
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* problem is not relevant for compiled in drivers as compiled
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* in drivers only init once.
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*
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* Credits:
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* Saeed Karamooz <saeed@ramix.com> of Ramix INC. for the
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* initial example code of how to initialize this device and for
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* help with questions I had concerning operation of the device.
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*
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* Most of the MTD code for this driver was originally written
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* for the slram.o module in the MTD drivers package which
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* allows the mapping of system memory into an MTD device.
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* Since the PMC551 memory module is accessed in the same
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* fashion as system memory, the slram.c code became a very nice
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* fit to the needs of this driver. All we added was PCI
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* detection/initialization to the driver and automatically figure
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* out the size via the PCI detection.o, later changes by Corey
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* Minyard set up the card to utilize a 1M sliding apature.
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*
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* Corey Minyard <minyard@nortelnetworks.com>
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* * Modified driver to utilize a sliding aperture instead of
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* mapping all memory into kernel space which turned out to
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* be very wasteful.
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* * Located a bug in the SROM's initialization sequence that
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* made the memory unusable, added a fix to code to touch up
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* the DRAM some.
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*
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* Bugs/FIXME's:
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* * MUST fix the init function to not spin on a register
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* waiting for it to set .. this does not safely handle busted
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* devices that never reset the register correctly which will
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* cause the system to hang w/ a reboot being the only chance at
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* recover. [sort of fixed, could be better]
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* * Add I2C handling of the SROM so we can read the SROM's information
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* about the aperture size. This should always accurately reflect the
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* onboard memory size.
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* * Comb the init routine. It's still a bit cludgy on a few things.
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*/
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#include <linux/version.h>
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#include <linux/config.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <asm/uaccess.h>
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#include <linux/types.h>
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#include <linux/sched.h>
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#include <linux/init.h>
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#include <linux/ptrace.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/timer.h>
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#include <linux/major.h>
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#include <linux/fs.h>
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#include <linux/ioctl.h>
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#include <asm/io.h>
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#include <asm/system.h>
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#include <linux/pci.h>
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#ifndef CONFIG_PCI
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#error Enable PCI in your kernel config
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#endif
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/pmc551.h>
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#include <linux/mtd/compatmac.h>
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static struct mtd_info *pmc551list;
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static int pmc551_erase (struct mtd_info *mtd, struct erase_info *instr)
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{
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struct mypriv *priv = mtd->priv;
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u32 soff_hi, soff_lo; /* start address offset hi/lo */
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u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
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unsigned long end;
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u_char *ptr;
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size_t retlen;
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#ifdef CONFIG_MTD_PMC551_DEBUG
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printk(KERN_DEBUG "pmc551_erase(pos:%ld, len:%ld)\n", (long)instr->addr, (long)instr->len);
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#endif
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end = instr->addr + instr->len - 1;
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/* Is it past the end? */
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if ( end > mtd->size ) {
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#ifdef CONFIG_MTD_PMC551_DEBUG
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printk(KERN_DEBUG "pmc551_erase() out of bounds (%ld > %ld)\n", (long)end, (long)mtd->size);
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#endif
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return -EINVAL;
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}
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eoff_hi = end & ~(priv->asize - 1);
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soff_hi = instr->addr & ~(priv->asize - 1);
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eoff_lo = end & (priv->asize - 1);
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soff_lo = instr->addr & (priv->asize - 1);
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pmc551_point (mtd, instr->addr, instr->len, &retlen, &ptr);
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if ( soff_hi == eoff_hi || mtd->size == priv->asize) {
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/* The whole thing fits within one access, so just one shot
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will do it. */
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memset(ptr, 0xff, instr->len);
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} else {
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/* We have to do multiple writes to get all the data
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written. */
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while (soff_hi != eoff_hi) {
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#ifdef CONFIG_MTD_PMC551_DEBUG
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printk( KERN_DEBUG "pmc551_erase() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
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#endif
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memset(ptr, 0xff, priv->asize);
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if (soff_hi + priv->asize >= mtd->size) {
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goto out;
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}
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soff_hi += priv->asize;
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pmc551_point (mtd,(priv->base_map0|soff_hi),
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priv->asize, &retlen, &ptr);
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}
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memset (ptr, 0xff, eoff_lo);
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}
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out:
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instr->state = MTD_ERASE_DONE;
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#ifdef CONFIG_MTD_PMC551_DEBUG
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printk(KERN_DEBUG "pmc551_erase() done\n");
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#endif
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mtd_erase_callback(instr);
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return 0;
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}
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static int pmc551_point (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char **mtdbuf)
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{
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struct mypriv *priv = mtd->priv;
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u32 soff_hi;
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u32 soff_lo;
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#ifdef CONFIG_MTD_PMC551_DEBUG
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printk(KERN_DEBUG "pmc551_point(%ld, %ld)\n", (long)from, (long)len);
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#endif
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if (from + len > mtd->size) {
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#ifdef CONFIG_MTD_PMC551_DEBUG
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printk(KERN_DEBUG "pmc551_point() out of bounds (%ld > %ld)\n", (long)from+len, (long)mtd->size);
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#endif
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return -EINVAL;
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}
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soff_hi = from & ~(priv->asize - 1);
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soff_lo = from & (priv->asize - 1);
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/* Cheap hack optimization */
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if( priv->curr_map0 != from ) {
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pci_write_config_dword ( priv->dev, PMC551_PCI_MEM_MAP0,
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(priv->base_map0 | soff_hi) );
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priv->curr_map0 = soff_hi;
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}
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*mtdbuf = priv->start + soff_lo;
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*retlen = len;
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return 0;
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}
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static void pmc551_unpoint (struct mtd_info *mtd, u_char *addr, loff_t from, size_t len)
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{
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#ifdef CONFIG_MTD_PMC551_DEBUG
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printk(KERN_DEBUG "pmc551_unpoint()\n");
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#endif
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}
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static int pmc551_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
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{
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struct mypriv *priv = mtd->priv;
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u32 soff_hi, soff_lo; /* start address offset hi/lo */
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u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
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unsigned long end;
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u_char *ptr;
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u_char *copyto = buf;
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#ifdef CONFIG_MTD_PMC551_DEBUG
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printk(KERN_DEBUG "pmc551_read(pos:%ld, len:%ld) asize: %ld\n", (long)from, (long)len, (long)priv->asize);
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#endif
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end = from + len - 1;
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/* Is it past the end? */
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if (end > mtd->size) {
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#ifdef CONFIG_MTD_PMC551_DEBUG
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printk(KERN_DEBUG "pmc551_read() out of bounds (%ld > %ld)\n", (long) end, (long)mtd->size);
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#endif
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return -EINVAL;
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}
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soff_hi = from & ~(priv->asize - 1);
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eoff_hi = end & ~(priv->asize - 1);
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soff_lo = from & (priv->asize - 1);
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eoff_lo = end & (priv->asize - 1);
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pmc551_point (mtd, from, len, retlen, &ptr);
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if (soff_hi == eoff_hi) {
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/* The whole thing fits within one access, so just one shot
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will do it. */
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memcpy(copyto, ptr, len);
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copyto += len;
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} else {
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/* We have to do multiple writes to get all the data
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written. */
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while (soff_hi != eoff_hi) {
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#ifdef CONFIG_MTD_PMC551_DEBUG
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printk( KERN_DEBUG "pmc551_read() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
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#endif
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memcpy(copyto, ptr, priv->asize);
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copyto += priv->asize;
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if (soff_hi + priv->asize >= mtd->size) {
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goto out;
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}
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soff_hi += priv->asize;
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pmc551_point (mtd, soff_hi, priv->asize, retlen, &ptr);
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}
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memcpy(copyto, ptr, eoff_lo);
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copyto += eoff_lo;
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}
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out:
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#ifdef CONFIG_MTD_PMC551_DEBUG
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printk(KERN_DEBUG "pmc551_read() done\n");
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#endif
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*retlen = copyto - buf;
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return 0;
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}
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static int pmc551_write (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf)
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{
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struct mypriv *priv = mtd->priv;
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u32 soff_hi, soff_lo; /* start address offset hi/lo */
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u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
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unsigned long end;
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u_char *ptr;
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const u_char *copyfrom = buf;
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#ifdef CONFIG_MTD_PMC551_DEBUG
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printk(KERN_DEBUG "pmc551_write(pos:%ld, len:%ld) asize:%ld\n", (long)to, (long)len, (long)priv->asize);
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#endif
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end = to + len - 1;
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/* Is it past the end? or did the u32 wrap? */
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if (end > mtd->size ) {
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#ifdef CONFIG_MTD_PMC551_DEBUG
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printk(KERN_DEBUG "pmc551_write() out of bounds (end: %ld, size: %ld, to: %ld)\n", (long) end, (long)mtd->size, (long)to);
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#endif
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return -EINVAL;
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}
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soff_hi = to & ~(priv->asize - 1);
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eoff_hi = end & ~(priv->asize - 1);
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soff_lo = to & (priv->asize - 1);
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eoff_lo = end & (priv->asize - 1);
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pmc551_point (mtd, to, len, retlen, &ptr);
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if (soff_hi == eoff_hi) {
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/* The whole thing fits within one access, so just one shot
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will do it. */
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memcpy(ptr, copyfrom, len);
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copyfrom += len;
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} else {
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/* We have to do multiple writes to get all the data
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written. */
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while (soff_hi != eoff_hi) {
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#ifdef CONFIG_MTD_PMC551_DEBUG
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printk( KERN_DEBUG "pmc551_write() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
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#endif
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memcpy(ptr, copyfrom, priv->asize);
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copyfrom += priv->asize;
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if (soff_hi >= mtd->size) {
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goto out;
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}
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soff_hi += priv->asize;
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pmc551_point (mtd, soff_hi, priv->asize, retlen, &ptr);
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}
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memcpy(ptr, copyfrom, eoff_lo);
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copyfrom += eoff_lo;
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}
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out:
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#ifdef CONFIG_MTD_PMC551_DEBUG
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printk(KERN_DEBUG "pmc551_write() done\n");
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#endif
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*retlen = copyfrom - buf;
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return 0;
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}
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/*
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* Fixup routines for the V370PDC
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* PCI device ID 0x020011b0
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*
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* This function basicly kick starts the DRAM oboard the card and gets it
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* ready to be used. Before this is done the device reads VERY erratic, so
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* much that it can crash the Linux 2.2.x series kernels when a user cat's
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* /proc/pci .. though that is mainly a kernel bug in handling the PCI DEVSEL
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* register. FIXME: stop spinning on registers .. must implement a timeout
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* mechanism
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* returns the size of the memory region found.
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*/
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static u32 fixup_pmc551 (struct pci_dev *dev)
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{
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#ifdef CONFIG_MTD_PMC551_BUGFIX
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u32 dram_data;
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#endif
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u32 size, dcmd, cfg, dtmp;
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u16 cmd, tmp, i;
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u8 bcmd, counter;
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/* Sanity Check */
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if(!dev) {
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return -ENODEV;
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}
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|
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/*
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* Attempt to reset the card
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* FIXME: Stop Spinning registers
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*/
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counter=0;
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/* unlock registers */
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pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, 0xA5 );
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/* read in old data */
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pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd );
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/* bang the reset line up and down for a few */
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for(i=0;i<10;i++) {
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counter=0;
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bcmd &= ~0x80;
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while(counter++ < 100) {
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pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
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}
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counter=0;
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bcmd |= 0x80;
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while(counter++ < 100) {
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pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
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}
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}
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bcmd |= (0x40|0x20);
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pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
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|
|
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/*
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* Take care and turn off the memory on the device while we
|
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* tweak the configurations
|
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*/
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pci_read_config_word(dev, PCI_COMMAND, &cmd);
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tmp = cmd & ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY);
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pci_write_config_word(dev, PCI_COMMAND, tmp);
|
|
|
|
/*
|
|
* Disable existing aperture before probing memory size
|
|
*/
|
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pci_read_config_dword(dev, PMC551_PCI_MEM_MAP0, &dcmd);
|
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dtmp=(dcmd|PMC551_PCI_MEM_MAP_ENABLE|PMC551_PCI_MEM_MAP_REG_EN);
|
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pci_write_config_dword(dev, PMC551_PCI_MEM_MAP0, dtmp);
|
|
/*
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|
* Grab old BAR0 config so that we can figure out memory size
|
|
* This is another bit of kludge going on. The reason for the
|
|
* redundancy is I am hoping to retain the original configuration
|
|
* previously assigned to the card by the BIOS or some previous
|
|
* fixup routine in the kernel. So we read the old config into cfg,
|
|
* then write all 1's to the memory space, read back the result into
|
|
* "size", and then write back all the old config.
|
|
*/
|
|
pci_read_config_dword( dev, PCI_BASE_ADDRESS_0, &cfg );
|
|
#ifndef CONFIG_MTD_PMC551_BUGFIX
|
|
pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, ~0 );
|
|
pci_read_config_dword( dev, PCI_BASE_ADDRESS_0, &size );
|
|
size = (size&PCI_BASE_ADDRESS_MEM_MASK);
|
|
size &= ~(size-1);
|
|
pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
|
|
#else
|
|
/*
|
|
* Get the size of the memory by reading all the DRAM size values
|
|
* and adding them up.
|
|
*
|
|
* KLUDGE ALERT: the boards we are using have invalid column and
|
|
* row mux values. We fix them here, but this will break other
|
|
* memory configurations.
|
|
*/
|
|
pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dram_data);
|
|
size = PMC551_DRAM_BLK_GET_SIZE(dram_data);
|
|
dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
|
|
dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
|
|
pci_write_config_dword(dev, PMC551_DRAM_BLK0, dram_data);
|
|
|
|
pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dram_data);
|
|
size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
|
|
dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
|
|
dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
|
|
pci_write_config_dword(dev, PMC551_DRAM_BLK1, dram_data);
|
|
|
|
pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dram_data);
|
|
size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
|
|
dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
|
|
dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
|
|
pci_write_config_dword(dev, PMC551_DRAM_BLK2, dram_data);
|
|
|
|
pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dram_data);
|
|
size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
|
|
dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
|
|
dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
|
|
pci_write_config_dword(dev, PMC551_DRAM_BLK3, dram_data);
|
|
|
|
/*
|
|
* Oops .. something went wrong
|
|
*/
|
|
if( (size &= PCI_BASE_ADDRESS_MEM_MASK) == 0) {
|
|
return -ENODEV;
|
|
}
|
|
#endif /* CONFIG_MTD_PMC551_BUGFIX */
|
|
|
|
if ((cfg&PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_MEMORY) {
|
|
return -ENODEV;
|
|
}
|
|
|
|
/*
|
|
* Precharge Dram
|
|
*/
|
|
pci_write_config_word( dev, PMC551_SDRAM_MA, 0x0400 );
|
|
pci_write_config_word( dev, PMC551_SDRAM_CMD, 0x00bf );
|
|
|
|
/*
|
|
* Wait until command has gone through
|
|
* FIXME: register spinning issue
|
|
*/
|
|
do { pci_read_config_word( dev, PMC551_SDRAM_CMD, &cmd );
|
|
if(counter++ > 100)break;
|
|
} while ( (PCI_COMMAND_IO) & cmd );
|
|
|
|
/*
|
|
* Turn on auto refresh
|
|
* The loop is taken directly from Ramix's example code. I assume that
|
|
* this must be held high for some duration of time, but I can find no
|
|
* documentation refrencing the reasons why.
|
|
*/
|
|
for ( i = 1; i<=8 ; i++) {
|
|
pci_write_config_word (dev, PMC551_SDRAM_CMD, 0x0df);
|
|
|
|
/*
|
|
* Make certain command has gone through
|
|
* FIXME: register spinning issue
|
|
*/
|
|
counter=0;
|
|
do { pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
|
|
if(counter++ > 100)break;
|
|
} while ( (PCI_COMMAND_IO) & cmd );
|
|
}
|
|
|
|
pci_write_config_word ( dev, PMC551_SDRAM_MA, 0x0020);
|
|
pci_write_config_word ( dev, PMC551_SDRAM_CMD, 0x0ff);
|
|
|
|
/*
|
|
* Wait until command completes
|
|
* FIXME: register spinning issue
|
|
*/
|
|
counter=0;
|
|
do { pci_read_config_word ( dev, PMC551_SDRAM_CMD, &cmd);
|
|
if(counter++ > 100)break;
|
|
} while ( (PCI_COMMAND_IO) & cmd );
|
|
|
|
pci_read_config_dword ( dev, PMC551_DRAM_CFG, &dcmd);
|
|
dcmd |= 0x02000000;
|
|
pci_write_config_dword ( dev, PMC551_DRAM_CFG, dcmd);
|
|
|
|
/*
|
|
* Check to make certain fast back-to-back, if not
|
|
* then set it so
|
|
*/
|
|
pci_read_config_word( dev, PCI_STATUS, &cmd);
|
|
if((cmd&PCI_COMMAND_FAST_BACK) == 0) {
|
|
cmd |= PCI_COMMAND_FAST_BACK;
|
|
pci_write_config_word( dev, PCI_STATUS, cmd);
|
|
}
|
|
|
|
/*
|
|
* Check to make certain the DEVSEL is set correctly, this device
|
|
* has a tendancy to assert DEVSEL and TRDY when a write is performed
|
|
* to the memory when memory is read-only
|
|
*/
|
|
if((cmd&PCI_STATUS_DEVSEL_MASK) != 0x0) {
|
|
cmd &= ~PCI_STATUS_DEVSEL_MASK;
|
|
pci_write_config_word( dev, PCI_STATUS, cmd );
|
|
}
|
|
/*
|
|
* Set to be prefetchable and put everything back based on old cfg.
|
|
* it's possible that the reset of the V370PDC nuked the original
|
|
* setup
|
|
*/
|
|
/*
|
|
cfg |= PCI_BASE_ADDRESS_MEM_PREFETCH;
|
|
pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
|
|
*/
|
|
|
|
/*
|
|
* Turn PCI memory and I/O bus access back on
|
|
*/
|
|
pci_write_config_word( dev, PCI_COMMAND,
|
|
PCI_COMMAND_MEMORY | PCI_COMMAND_IO );
|
|
#ifdef CONFIG_MTD_PMC551_DEBUG
|
|
/*
|
|
* Some screen fun
|
|
*/
|
|
printk(KERN_DEBUG "pmc551: %d%c (0x%x) of %sprefetchable memory at 0x%lx\n",
|
|
(size<1024)?size:(size<1048576)?size>>10:size>>20,
|
|
(size<1024)?'B':(size<1048576)?'K':'M',
|
|
size, ((dcmd&(0x1<<3)) == 0)?"non-":"",
|
|
(dev->resource[0].start)&PCI_BASE_ADDRESS_MEM_MASK );
|
|
|
|
/*
|
|
* Check to see the state of the memory
|
|
*/
|
|
pci_read_config_dword( dev, PMC551_DRAM_BLK0, &dcmd );
|
|
printk(KERN_DEBUG "pmc551: DRAM_BLK0 Flags: %s,%s\n"
|
|
"pmc551: DRAM_BLK0 Size: %d at %d\n"
|
|
"pmc551: DRAM_BLK0 Row MUX: %d, Col MUX: %d\n",
|
|
(((0x1<<1)&dcmd) == 0)?"RW":"RO",
|
|
(((0x1<<0)&dcmd) == 0)?"Off":"On",
|
|
PMC551_DRAM_BLK_GET_SIZE(dcmd),
|
|
((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
|
|
|
|
pci_read_config_dword( dev, PMC551_DRAM_BLK1, &dcmd );
|
|
printk(KERN_DEBUG "pmc551: DRAM_BLK1 Flags: %s,%s\n"
|
|
"pmc551: DRAM_BLK1 Size: %d at %d\n"
|
|
"pmc551: DRAM_BLK1 Row MUX: %d, Col MUX: %d\n",
|
|
(((0x1<<1)&dcmd) == 0)?"RW":"RO",
|
|
(((0x1<<0)&dcmd) == 0)?"Off":"On",
|
|
PMC551_DRAM_BLK_GET_SIZE(dcmd),
|
|
((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
|
|
|
|
pci_read_config_dword( dev, PMC551_DRAM_BLK2, &dcmd );
|
|
printk(KERN_DEBUG "pmc551: DRAM_BLK2 Flags: %s,%s\n"
|
|
"pmc551: DRAM_BLK2 Size: %d at %d\n"
|
|
"pmc551: DRAM_BLK2 Row MUX: %d, Col MUX: %d\n",
|
|
(((0x1<<1)&dcmd) == 0)?"RW":"RO",
|
|
(((0x1<<0)&dcmd) == 0)?"Off":"On",
|
|
PMC551_DRAM_BLK_GET_SIZE(dcmd),
|
|
((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
|
|
|
|
pci_read_config_dword( dev, PMC551_DRAM_BLK3, &dcmd );
|
|
printk(KERN_DEBUG "pmc551: DRAM_BLK3 Flags: %s,%s\n"
|
|
"pmc551: DRAM_BLK3 Size: %d at %d\n"
|
|
"pmc551: DRAM_BLK3 Row MUX: %d, Col MUX: %d\n",
|
|
(((0x1<<1)&dcmd) == 0)?"RW":"RO",
|
|
(((0x1<<0)&dcmd) == 0)?"Off":"On",
|
|
PMC551_DRAM_BLK_GET_SIZE(dcmd),
|
|
((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
|
|
|
|
pci_read_config_word( dev, PCI_COMMAND, &cmd );
|
|
printk( KERN_DEBUG "pmc551: Memory Access %s\n",
|
|
(((0x1<<1)&cmd) == 0)?"off":"on" );
|
|
printk( KERN_DEBUG "pmc551: I/O Access %s\n",
|
|
(((0x1<<0)&cmd) == 0)?"off":"on" );
|
|
|
|
pci_read_config_word( dev, PCI_STATUS, &cmd );
|
|
printk( KERN_DEBUG "pmc551: Devsel %s\n",
|
|
((PCI_STATUS_DEVSEL_MASK&cmd)==0x000)?"Fast":
|
|
((PCI_STATUS_DEVSEL_MASK&cmd)==0x200)?"Medium":
|
|
((PCI_STATUS_DEVSEL_MASK&cmd)==0x400)?"Slow":"Invalid" );
|
|
|
|
printk( KERN_DEBUG "pmc551: %sFast Back-to-Back\n",
|
|
((PCI_COMMAND_FAST_BACK&cmd) == 0)?"Not ":"" );
|
|
|
|
pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd );
|
|
printk( KERN_DEBUG "pmc551: EEPROM is under %s control\n"
|
|
"pmc551: System Control Register is %slocked to PCI access\n"
|
|
"pmc551: System Control Register is %slocked to EEPROM access\n",
|
|
(bcmd&0x1)?"software":"hardware",
|
|
(bcmd&0x20)?"":"un", (bcmd&0x40)?"":"un");
|
|
#endif
|
|
return size;
|
|
}
|
|
|
|
/*
|
|
* Kernel version specific module stuffages
|
|
*/
|
|
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_AUTHOR("Mark Ferrell <mferrell@mvista.com>");
|
|
MODULE_DESCRIPTION(PMC551_VERSION);
|
|
|
|
/*
|
|
* Stuff these outside the ifdef so as to not bust compiled in driver support
|
|
*/
|
|
static int msize=0;
|
|
#if defined(CONFIG_MTD_PMC551_APERTURE_SIZE)
|
|
static int asize=CONFIG_MTD_PMC551_APERTURE_SIZE
|
|
#else
|
|
static int asize=0;
|
|
#endif
|
|
|
|
module_param(msize, int, 0);
|
|
MODULE_PARM_DESC(msize, "memory size in Megabytes [1 - 1024]");
|
|
module_param(asize, int, 0);
|
|
MODULE_PARM_DESC(asize, "aperture size, must be <= memsize [1-1024]");
|
|
|
|
/*
|
|
* PMC551 Card Initialization
|
|
*/
|
|
static int __init init_pmc551(void)
|
|
{
|
|
struct pci_dev *PCI_Device = NULL;
|
|
struct mypriv *priv;
|
|
int count, found=0;
|
|
struct mtd_info *mtd;
|
|
u32 length = 0;
|
|
|
|
if(msize) {
|
|
msize = (1 << (ffs(msize) - 1))<<20;
|
|
if (msize > (1<<30)) {
|
|
printk(KERN_NOTICE "pmc551: Invalid memory size [%d]\n", msize);
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
if(asize) {
|
|
asize = (1 << (ffs(asize) - 1))<<20;
|
|
if (asize > (1<<30) ) {
|
|
printk(KERN_NOTICE "pmc551: Invalid aperture size [%d]\n", asize);
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
printk(KERN_INFO PMC551_VERSION);
|
|
|
|
/*
|
|
* PCU-bus chipset probe.
|
|
*/
|
|
for( count = 0; count < MAX_MTD_DEVICES; count++ ) {
|
|
|
|
if ((PCI_Device = pci_find_device(PCI_VENDOR_ID_V3_SEMI,
|
|
PCI_DEVICE_ID_V3_SEMI_V370PDC,
|
|
PCI_Device ) ) == NULL) {
|
|
break;
|
|
}
|
|
|
|
printk(KERN_NOTICE "pmc551: Found PCI V370PDC at 0x%lX\n",
|
|
PCI_Device->resource[0].start);
|
|
|
|
/*
|
|
* The PMC551 device acts VERY weird if you don't init it
|
|
* first. i.e. it will not correctly report devsel. If for
|
|
* some reason the sdram is in a wrote-protected state the
|
|
* device will DEVSEL when it is written to causing problems
|
|
* with the oldproc.c driver in
|
|
* some kernels (2.2.*)
|
|
*/
|
|
if((length = fixup_pmc551(PCI_Device)) <= 0) {
|
|
printk(KERN_NOTICE "pmc551: Cannot init SDRAM\n");
|
|
break;
|
|
}
|
|
|
|
/*
|
|
* This is needed until the driver is capable of reading the
|
|
* onboard I2C SROM to discover the "real" memory size.
|
|
*/
|
|
if(msize) {
|
|
length = msize;
|
|
printk(KERN_NOTICE "pmc551: Using specified memory size 0x%x\n", length);
|
|
} else {
|
|
msize = length;
|
|
}
|
|
|
|
mtd = kmalloc(sizeof(struct mtd_info), GFP_KERNEL);
|
|
if (!mtd) {
|
|
printk(KERN_NOTICE "pmc551: Cannot allocate new MTD device.\n");
|
|
break;
|
|
}
|
|
|
|
memset(mtd, 0, sizeof(struct mtd_info));
|
|
|
|
priv = kmalloc (sizeof(struct mypriv), GFP_KERNEL);
|
|
if (!priv) {
|
|
printk(KERN_NOTICE "pmc551: Cannot allocate new MTD device.\n");
|
|
kfree(mtd);
|
|
break;
|
|
}
|
|
memset(priv, 0, sizeof(*priv));
|
|
mtd->priv = priv;
|
|
priv->dev = PCI_Device;
|
|
|
|
if(asize > length) {
|
|
printk(KERN_NOTICE "pmc551: reducing aperture size to fit %dM\n",length>>20);
|
|
priv->asize = asize = length;
|
|
} else if (asize == 0 || asize == length) {
|
|
printk(KERN_NOTICE "pmc551: Using existing aperture size %dM\n", length>>20);
|
|
priv->asize = asize = length;
|
|
} else {
|
|
printk(KERN_NOTICE "pmc551: Using specified aperture size %dM\n", asize>>20);
|
|
priv->asize = asize;
|
|
}
|
|
priv->start = ioremap(((PCI_Device->resource[0].start)
|
|
& PCI_BASE_ADDRESS_MEM_MASK),
|
|
priv->asize);
|
|
|
|
if (!priv->start) {
|
|
printk(KERN_NOTICE "pmc551: Unable to map IO space\n");
|
|
kfree(mtd->priv);
|
|
kfree(mtd);
|
|
break;
|
|
}
|
|
|
|
#ifdef CONFIG_MTD_PMC551_DEBUG
|
|
printk( KERN_DEBUG "pmc551: setting aperture to %d\n",
|
|
ffs(priv->asize>>20)-1);
|
|
#endif
|
|
|
|
priv->base_map0 = ( PMC551_PCI_MEM_MAP_REG_EN
|
|
| PMC551_PCI_MEM_MAP_ENABLE
|
|
| (ffs(priv->asize>>20)-1)<<4 );
|
|
priv->curr_map0 = priv->base_map0;
|
|
pci_write_config_dword ( priv->dev, PMC551_PCI_MEM_MAP0,
|
|
priv->curr_map0 );
|
|
|
|
#ifdef CONFIG_MTD_PMC551_DEBUG
|
|
printk( KERN_DEBUG "pmc551: aperture set to %d\n",
|
|
(priv->base_map0 & 0xF0)>>4 );
|
|
#endif
|
|
|
|
mtd->size = msize;
|
|
mtd->flags = MTD_CAP_RAM;
|
|
mtd->erase = pmc551_erase;
|
|
mtd->read = pmc551_read;
|
|
mtd->write = pmc551_write;
|
|
mtd->point = pmc551_point;
|
|
mtd->unpoint = pmc551_unpoint;
|
|
mtd->type = MTD_RAM;
|
|
mtd->name = "PMC551 RAM board";
|
|
mtd->erasesize = 0x10000;
|
|
mtd->owner = THIS_MODULE;
|
|
|
|
if (add_mtd_device(mtd)) {
|
|
printk(KERN_NOTICE "pmc551: Failed to register new device\n");
|
|
iounmap(priv->start);
|
|
kfree(mtd->priv);
|
|
kfree(mtd);
|
|
break;
|
|
}
|
|
printk(KERN_NOTICE "Registered pmc551 memory device.\n");
|
|
printk(KERN_NOTICE "Mapped %dM of memory from 0x%p to 0x%p\n",
|
|
priv->asize>>20,
|
|
priv->start,
|
|
priv->start + priv->asize);
|
|
printk(KERN_NOTICE "Total memory is %d%c\n",
|
|
(length<1024)?length:
|
|
(length<1048576)?length>>10:length>>20,
|
|
(length<1024)?'B':(length<1048576)?'K':'M');
|
|
priv->nextpmc551 = pmc551list;
|
|
pmc551list = mtd;
|
|
found++;
|
|
}
|
|
|
|
if( !pmc551list ) {
|
|
printk(KERN_NOTICE "pmc551: not detected\n");
|
|
return -ENODEV;
|
|
} else {
|
|
printk(KERN_NOTICE "pmc551: %d pmc551 devices loaded\n", found);
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* PMC551 Card Cleanup
|
|
*/
|
|
static void __exit cleanup_pmc551(void)
|
|
{
|
|
int found=0;
|
|
struct mtd_info *mtd;
|
|
struct mypriv *priv;
|
|
|
|
while((mtd=pmc551list)) {
|
|
priv = mtd->priv;
|
|
pmc551list = priv->nextpmc551;
|
|
|
|
if(priv->start) {
|
|
printk (KERN_DEBUG "pmc551: unmapping %dM starting at 0x%p\n",
|
|
priv->asize>>20, priv->start);
|
|
iounmap (priv->start);
|
|
}
|
|
|
|
kfree (mtd->priv);
|
|
del_mtd_device (mtd);
|
|
kfree (mtd);
|
|
found++;
|
|
}
|
|
|
|
printk(KERN_NOTICE "pmc551: %d pmc551 devices unloaded\n", found);
|
|
}
|
|
|
|
module_init(init_pmc551);
|
|
module_exit(cleanup_pmc551);
|